提交 e3da9921 编写于 作者: R Rabin Vincent 提交者: Peter Maydell

armv7m_nvic: fix CPUID Base Register

cp15.c0_cpuid is never initialized for ARMv7-M; take the value directly
from cpu->midr instead.
Signed-off-by: NRabin Vincent <rabin@rab.in>
Message-id: 1398036308-32166-1-git-send-email-rabin@rab.in
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
上级 3b771579
...@@ -173,7 +173,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset) ...@@ -173,7 +173,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
return 10000; return 10000;
case 0xd00: /* CPUID Base. */ case 0xd00: /* CPUID Base. */
cpu = ARM_CPU(current_cpu); cpu = ARM_CPU(current_cpu);
return cpu->env.cp15.c0_cpuid; return cpu->midr;
case 0xd04: /* Interrupt Control State. */ case 0xd04: /* Interrupt Control State. */
/* VECTACTIVE */ /* VECTACTIVE */
val = s->gic.running_irq[0]; val = s->gic.running_irq[0];
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册