提交 d64477af 编写于 作者: B bellard

imul imm8 fix - 0x82 opcode support (Hidemi KAWAI)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@735 c046a42c-6fe2-441c-8c8c-71466251a162
上级 f6bac380
......@@ -389,6 +389,7 @@ static int disas_insn(DisasContext *s)
case 0x80: /* GRP1 */
case 0x81:
case 0x82:
case 0x83:
{
if ((b & 1) == 0)
......@@ -403,6 +404,7 @@ static int disas_insn(DisasContext *s)
default:
case 0x80:
case 0x81:
case 0x82:
insn_get(s, ot);
break;
case 0x83:
......
......@@ -1938,6 +1938,7 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start)
case 0x80: /* GRP1 */
case 0x81:
case 0x82:
case 0x83:
{
int val;
......@@ -1963,6 +1964,7 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start)
default:
case 0x80:
case 0x81:
case 0x82:
val = insn_get(s, ot);
break;
case 0x83:
......@@ -2242,7 +2244,7 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start)
val = insn_get(s, ot);
gen_op_movl_T1_im(val);
} else if (b == 0x6b) {
val = insn_get(s, OT_BYTE);
val = (int8_t)insn_get(s, OT_BYTE);
gen_op_movl_T1_im(val);
} else {
gen_op_mov_TN_reg[ot][1][reg]();
......
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