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体验新版 GitCode,发现更多精彩内容 >>
提交
ced52fa6
编写于
9月 12, 2011
作者:
A
Avi Kivity
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
palm: convert to memory API
Signed-off-by:
N
Avi Kivity
<
avi@redhat.com
>
上级
f0cdd7a9
变更
1
隐藏空白更改
内联
并排
Showing
1 changed file
with
25 addition
and
28 deletion
+25
-28
hw/palm.c
hw/palm.c
+25
-28
未找到文件。
hw/palm.c
浏览文件 @
ced52fa6
...
@@ -54,16 +54,12 @@ static void static_write(void *opaque, target_phys_addr_t offset,
...
@@ -54,16 +54,12 @@ static void static_write(void *opaque, target_phys_addr_t offset,
#endif
#endif
}
}
static
CPUReadMemoryFunc
*
const
static_readfn
[]
=
{
static
const
MemoryRegionOps
static_ops
=
{
static_readb
,
.
old_mmio
=
{
static_readh
,
.
read
=
{
static_readb
,
static_readh
,
static_readw
,
},
static_readw
,
.
write
=
{
static_write
,
static_write
,
static_write
,
},
};
},
.
endianness
=
DEVICE_NATIVE_ENDIAN
,
static
CPUWriteMemoryFunc
*
const
static_writefn
[]
=
{
static_write
,
static_write
,
static_write
,
};
};
/* Palm Tunsgten|E support */
/* Palm Tunsgten|E support */
...
@@ -203,34 +199,35 @@ static void palmte_init(ram_addr_t ram_size,
...
@@ -203,34 +199,35 @@ static void palmte_init(ram_addr_t ram_size,
struct
omap_mpu_state_s
*
cpu
;
struct
omap_mpu_state_s
*
cpu
;
int
flash_size
=
0x00800000
;
int
flash_size
=
0x00800000
;
int
sdram_size
=
palmte_binfo
.
ram_size
;
int
sdram_size
=
palmte_binfo
.
ram_size
;
int
io
;
static
uint32_t
cs0val
=
0xffffffff
;
static
uint32_t
cs0val
=
0xffffffff
;
static
uint32_t
cs1val
=
0x0000e1a0
;
static
uint32_t
cs1val
=
0x0000e1a0
;
static
uint32_t
cs2val
=
0x0000e1a0
;
static
uint32_t
cs2val
=
0x0000e1a0
;
static
uint32_t
cs3val
=
0xe1a0e1a0
;
static
uint32_t
cs3val
=
0xe1a0e1a0
;
int
rom_size
,
rom_loaded
=
0
;
int
rom_size
,
rom_loaded
=
0
;
DisplayState
*
ds
=
get_displaystate
();
DisplayState
*
ds
=
get_displaystate
();
MemoryRegion
*
flash
=
g_new
(
MemoryRegion
,
1
);
MemoryRegion
*
cs
=
g_new
(
MemoryRegion
,
4
);
cpu
=
omap310_mpu_init
(
address_space_mem
,
sdram_size
,
cpu_model
);
cpu
=
omap310_mpu_init
(
address_space_mem
,
sdram_size
,
cpu_model
);
/* External Flash (EMIFS) */
/* External Flash (EMIFS) */
cpu_register_physical_memory
(
OMAP_CS0_BASE
,
flash_size
,
memory_region_init_ram
(
flash
,
NULL
,
"palmte.flash"
,
flash_size
);
qemu_ram_alloc
(
NULL
,
"palmte.flash"
,
memory_region_set_readonly
(
flash
,
true
);
flash_size
)
|
IO_MEM_ROM
);
memory_region_add_subregion
(
address_space_mem
,
OMAP_CS0_BASE
,
flash
);
io
=
cpu_register_io_memory
(
static_readfn
,
static_writefn
,
&
cs0val
,
memory_region_init_io
(
&
cs
[
0
],
&
static_ops
,
&
cs0val
,
"palmte-cs0"
,
DEVICE_NATIVE_ENDIAN
);
OMAP_CS0_SIZE
-
flash_size
);
cpu_register_physical_memory
(
OMAP_CS0_BASE
+
flash_size
,
memory_region_add_subregion
(
address_space_mem
,
OMAP_CS0_BASE
+
flash_size
,
OMAP_CS0_SIZE
-
flash_size
,
io
);
&
cs
[
0
]
);
io
=
cpu_register_io_memory
(
static_readfn
,
static_writefn
,
&
cs1val
,
memory_region_init_io
(
&
cs
[
1
],
&
static_ops
,
&
cs1val
,
"palmte-cs1"
,
DEVICE_NATIVE_ENDIAN
);
OMAP_CS1_SIZE
);
cpu_register_physical_memory
(
OMAP_CS1_BASE
,
OMAP_CS1_SIZE
,
io
);
memory_region_add_subregion
(
address_space_mem
,
OMAP_CS1_BASE
,
&
cs
[
1
]
);
io
=
cpu_register_io_memory
(
static_readfn
,
static_writefn
,
&
cs2val
,
memory_region_init_io
(
&
cs
[
2
],
&
static_ops
,
&
cs2val
,
"palmte-cs2"
,
DEVICE_NATIVE_ENDIAN
);
OMAP_CS2_SIZE
);
cpu_register_physical_memory
(
OMAP_CS2_BASE
,
OMAP_CS2_SIZE
,
io
);
memory_region_add_subregion
(
address_space_mem
,
OMAP_CS2_BASE
,
&
cs
[
2
]
);
io
=
cpu_register_io_memory
(
static_readfn
,
static_writefn
,
&
cs3val
,
memory_region_init_io
(
&
cs
[
3
],
&
static_ops
,
&
cs3val
,
"palmte-cs3"
,
DEVICE_NATIVE_ENDIAN
);
OMAP_CS3_SIZE
);
cpu_register_physical_memory
(
OMAP_CS3_BASE
,
OMAP_CS3_SIZE
,
io
);
memory_region_add_subregion
(
address_space_mem
,
OMAP_CS3_BASE
,
&
cs
[
3
]
);
palmte_microwire_setup
(
cpu
);
palmte_microwire_setup
(
cpu
);
...
...
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