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体验新版 GitCode,发现更多精彩内容 >>
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cd5cba79
编写于
11月 20, 2011
作者:
A
Avi Kivity
浏览文件
操作
浏览文件
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电子邮件补丁
差异文件
ppce500_pci: convert to memory API
Signed-off-by:
N
Avi Kivity
<
avi@redhat.com
>
上级
da726e5e
变更
1
隐藏空白更改
内联
并排
Showing
1 changed file
with
14 addition
and
20 deletion
+14
-20
hw/ppce500_pci.c
hw/ppce500_pci.c
+14
-20
未找到文件。
hw/ppce500_pci.c
浏览文件 @
cd5cba79
...
@@ -79,12 +79,13 @@ struct PPCE500PCIState {
...
@@ -79,12 +79,13 @@ struct PPCE500PCIState {
uint32_t
gasket_time
;
uint32_t
gasket_time
;
qemu_irq
irq
[
4
];
qemu_irq
irq
[
4
];
/* mmio maps */
/* mmio maps */
int
reg
;
MemoryRegion
iomem
;
};
};
typedef
struct
PPCE500PCIState
PPCE500PCIState
;
typedef
struct
PPCE500PCIState
PPCE500PCIState
;
static
uint32_t
pci_reg_read4
(
void
*
opaque
,
target_phys_addr_t
addr
)
static
uint64_t
pci_reg_read4
(
void
*
opaque
,
target_phys_addr_t
addr
,
unsigned
size
)
{
{
PPCE500PCIState
*
pci
=
opaque
;
PPCE500PCIState
*
pci
=
opaque
;
unsigned
long
win
;
unsigned
long
win
;
...
@@ -152,14 +153,8 @@ static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr)
...
@@ -152,14 +153,8 @@ static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr)
return
value
;
return
value
;
}
}
static
CPUReadMemoryFunc
*
const
e500_pci_reg_read
[]
=
{
&
pci_reg_read4
,
&
pci_reg_read4
,
&
pci_reg_read4
,
};
static
void
pci_reg_write4
(
void
*
opaque
,
target_phys_addr_t
addr
,
static
void
pci_reg_write4
(
void
*
opaque
,
target_phys_addr_t
addr
,
uint32_t
valu
e
)
uint64_t
value
,
unsigned
siz
e
)
{
{
PPCE500PCIState
*
pci
=
opaque
;
PPCE500PCIState
*
pci
=
opaque
;
unsigned
long
win
;
unsigned
long
win
;
...
@@ -168,7 +163,7 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
...
@@ -168,7 +163,7 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
win
=
addr
&
0xfe0
;
win
=
addr
&
0xfe0
;
pci_debug
(
"%s: value:%x -> win:%lx(addr:"
TARGET_FMT_plx
")
\n
"
,
pci_debug
(
"%s: value:%x -> win:%lx(addr:"
TARGET_FMT_plx
")
\n
"
,
__func__
,
value
,
win
,
addr
);
__func__
,
(
unsigned
)
value
,
win
,
addr
);
switch
(
win
)
{
switch
(
win
)
{
case
PPCE500_PCI_OW1
:
case
PPCE500_PCI_OW1
:
...
@@ -225,10 +220,10 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
...
@@ -225,10 +220,10 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
};
};
}
}
static
CPUWriteMemoryFunc
*
const
e500_pci_reg_write
[]
=
{
static
const
MemoryRegionOps
e500_pci_reg_ops
=
{
&
pci_reg_write
4
,
.
read
=
pci_reg_read
4
,
&
pci_reg_write4
,
.
write
=
pci_reg_write4
,
&
pci_reg_write4
,
.
endianness
=
DEVICE_BIG_ENDIAN
,
};
};
static
int
mpc85xx_pci_map_irq
(
PCIDevice
*
pci_dev
,
int
irq_num
)
static
int
mpc85xx_pci_map_irq
(
PCIDevice
*
pci_dev
,
int
irq_num
)
...
@@ -310,18 +305,17 @@ static void e500_pci_map(SysBusDevice *dev, target_phys_addr_t base)
...
@@ -310,18 +305,17 @@ static void e500_pci_map(SysBusDevice *dev, target_phys_addr_t base)
sysbus_add_memory
(
dev
,
base
+
PCIE500_CFGADDR
,
&
h
->
conf_mem
);
sysbus_add_memory
(
dev
,
base
+
PCIE500_CFGADDR
,
&
h
->
conf_mem
);
sysbus_add_memory
(
dev
,
base
+
PCIE500_CFGDATA
,
&
h
->
data_mem
);
sysbus_add_memory
(
dev
,
base
+
PCIE500_CFGDATA
,
&
h
->
data_mem
);
cpu_register_physical_memory
(
base
+
PCIE500_REG_BASE
,
PCIE500_REG_SIZE
,
sysbus_add_memory
(
dev
,
base
+
PCIE500_REG_BASE
,
&
s
->
iomem
);
s
->
reg
);
}
}
static
void
e500_pci_unmap
(
SysBusDevice
*
dev
,
target_phys_addr_t
base
)
static
void
e500_pci_unmap
(
SysBusDevice
*
dev
,
target_phys_addr_t
base
)
{
{
PCIHostState
*
h
=
FROM_SYSBUS
(
PCIHostState
,
sysbus_from_qdev
(
dev
));
PCIHostState
*
h
=
FROM_SYSBUS
(
PCIHostState
,
sysbus_from_qdev
(
dev
));
PPCE500PCIState
*
s
=
DO_UPCAST
(
PPCE500PCIState
,
pci_state
,
h
);
sysbus_del_memory
(
dev
,
&
h
->
conf_mem
);
sysbus_del_memory
(
dev
,
&
h
->
conf_mem
);
sysbus_del_memory
(
dev
,
&
h
->
data_mem
);
sysbus_del_memory
(
dev
,
&
h
->
data_mem
);
cpu_register_physical_memory
(
base
+
PCIE500_REG_BASE
,
PCIE500_REG_SIZE
,
sysbus_del_memory
(
dev
,
&
s
->
iomem
);
IO_MEM_UNASSIGNED
);
}
}
#include "exec-memory.h"
#include "exec-memory.h"
...
@@ -353,8 +347,8 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
...
@@ -353,8 +347,8 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
"pci-conf-idx"
,
4
);
"pci-conf-idx"
,
4
);
memory_region_init_io
(
&
h
->
data_mem
,
&
pci_host_data_le_ops
,
h
,
memory_region_init_io
(
&
h
->
data_mem
,
&
pci_host_data_le_ops
,
h
,
"pci-conf-data"
,
4
);
"pci-conf-data"
,
4
);
s
->
reg
=
cpu_register_io_memory
(
e500_pci_reg_read
,
e500_pci_reg_write
,
s
,
memory_region_init_io
(
&
s
->
iomem
,
&
e500_pci_reg_ops
,
s
,
DEVICE_BIG_ENDIAN
);
"pci.reg"
,
PCIE500_REG_SIZE
);
sysbus_init_mmio_cb2
(
dev
,
e500_pci_map
,
e500_pci_unmap
);
sysbus_init_mmio_cb2
(
dev
,
e500_pci_map
,
e500_pci_unmap
);
return
0
;
return
0
;
...
...
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