提交 cb3fb38e 编写于 作者: A Andreas Färber

target-m68k: Pass M68kCPU to m68k_set_irq_level()

Simplifies use of cpu_reset_interrupt() et al.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
上级 9a6ee9fd
...@@ -226,7 +226,7 @@ static void m5206_mbar_update(m5206_mbar_state *s) ...@@ -226,7 +226,7 @@ static void m5206_mbar_update(m5206_mbar_state *s)
level = 0; level = 0;
vector = 0; vector = 0;
} }
m68k_set_irq_level(&s->cpu->env, level, vector); m68k_set_irq_level(s->cpu, level, vector);
} }
static void m5206_mbar_set_irq(void *opaque, int irq, int level) static void m5206_mbar_set_irq(void *opaque, int irq, int level)
......
...@@ -40,7 +40,7 @@ static void mcf_intc_update(mcf_intc_state *s) ...@@ -40,7 +40,7 @@ static void mcf_intc_update(mcf_intc_state *s)
} }
} }
s->active_vector = ((best == 64) ? 24 : (best + 64)); s->active_vector = ((best == 64) ? 24 : (best + 64));
m68k_set_irq_level(&s->cpu->env, best_level, s->active_vector); m68k_set_irq_level(s->cpu, best_level, s->active_vector);
} }
static uint64_t mcf_intc_read(void *opaque, hwaddr addr, static uint64_t mcf_intc_read(void *opaque, hwaddr addr,
......
...@@ -169,7 +169,7 @@ enum { ...@@ -169,7 +169,7 @@ enum {
#define MACSR_V 0x002 #define MACSR_V 0x002
#define MACSR_EV 0x001 #define MACSR_EV 0x001
void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector); void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector);
void m68k_set_macsr(CPUM68KState *env, uint32_t val); void m68k_set_macsr(CPUM68KState *env, uint32_t val);
void m68k_switch_sp(CPUM68KState *env); void m68k_switch_sp(CPUM68KState *env);
......
...@@ -310,8 +310,10 @@ int cpu_m68k_handle_mmu_fault (CPUM68KState *env, target_ulong address, int rw, ...@@ -310,8 +310,10 @@ int cpu_m68k_handle_mmu_fault (CPUM68KState *env, target_ulong address, int rw,
be handled by the interrupt controller. Real hardware only requests be handled by the interrupt controller. Real hardware only requests
the vector when the interrupt is acknowledged by the CPU. For the vector when the interrupt is acknowledged by the CPU. For
simplicitly we calculate it when the interrupt is signalled. */ simplicitly we calculate it when the interrupt is signalled. */
void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector) void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector)
{ {
CPUM68KState *env = &cpu->env;
env->pending_level = level; env->pending_level = level;
env->pending_vector = vector; env->pending_vector = vector;
if (level) if (level)
......
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