提交 c54a416c 编写于 作者: P Peter Maydell

target/arm: Convert VFP VNMLS to decodetree

Convert the VFP VNMLS instruction to decodetree.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
上级 e7258280
......@@ -1341,3 +1341,45 @@ static bool trans_VMLS_dp(DisasContext *s, arg_VMLS_sp *a)
{
return do_vfp_3op_dp(s, gen_VMLS_dp, a->vd, a->vn, a->vm, true);
}
static void gen_VNMLS_sp(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, TCGv_ptr fpst)
{
/*
* VNMLS: -fd + (fn * fm)
* Note that it isn't valid to replace (-A + B) with (B - A) or similar
* plausible looking simplifications because this will give wrong results
* for NaNs.
*/
TCGv_i32 tmp = tcg_temp_new_i32();
gen_helper_vfp_muls(tmp, vn, vm, fpst);
gen_helper_vfp_negs(vd, vd);
gen_helper_vfp_adds(vd, vd, tmp, fpst);
tcg_temp_free_i32(tmp);
}
static bool trans_VNMLS_sp(DisasContext *s, arg_VNMLS_sp *a)
{
return do_vfp_3op_sp(s, gen_VNMLS_sp, a->vd, a->vn, a->vm, true);
}
static void gen_VNMLS_dp(TCGv_i64 vd, TCGv_i64 vn, TCGv_i64 vm, TCGv_ptr fpst)
{
/*
* VNMLS: -fd + (fn * fm)
* Note that it isn't valid to replace (-A + B) with (B - A) or similar
* plausible looking simplifications because this will give wrong results
* for NaNs.
*/
TCGv_i64 tmp = tcg_temp_new_i64();
gen_helper_vfp_muld(tmp, vn, vm, fpst);
gen_helper_vfp_negd(vd, vd);
gen_helper_vfp_addd(vd, vd, tmp, fpst);
tcg_temp_free_i64(tmp);
}
static bool trans_VNMLS_dp(DisasContext *s, arg_VNMLS_sp *a)
{
return do_vfp_3op_dp(s, gen_VNMLS_dp, a->vd, a->vn, a->vm, true);
}
......@@ -1393,18 +1393,6 @@ VFP_OP2(div)
#undef VFP_OP2
static inline void gen_vfp_F1_mul(int dp)
{
/* Like gen_vfp_mul() but put result in F1 */
TCGv_ptr fpst = get_fpstatus_ptr(0);
if (dp) {
gen_helper_vfp_muld(cpu_F1d, cpu_F0d, cpu_F1d, fpst);
} else {
gen_helper_vfp_muls(cpu_F1s, cpu_F0s, cpu_F1s, fpst);
}
tcg_temp_free_ptr(fpst);
}
static inline void gen_vfp_F1_neg(int dp)
{
/* Like gen_vfp_neg() but put result in F1 */
......@@ -3134,7 +3122,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
rn = VFP_SREG_N(insn);
switch (op) {
case 0 ... 1:
case 0 ... 2:
/* Already handled by decodetree */
return 1;
default:
......@@ -3320,16 +3308,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
for (;;) {
/* Perform the calculation. */
switch (op) {
case 2: /* VNMLS: -fd + (fn * fm) */
/* Note that it isn't valid to replace (-A + B) with (B - A)
* or similar plausible looking simplifications
* because this will give wrong results for NaNs.
*/
gen_vfp_F1_mul(dp);
gen_mov_F0_vreg(dp, rd);
gen_vfp_neg(dp);
gen_vfp_add(dp);
break;
case 3: /* VNMLA: -fd + -(fn * fm) */
gen_vfp_mul(dp);
gen_vfp_F1_neg(dp);
......
......@@ -107,3 +107,8 @@ VMLS_sp ---- 1110 0.00 .... .... 1010 .1.0 .... \
vm=%vm_sp vn=%vn_sp vd=%vd_sp
VMLS_dp ---- 1110 0.00 .... .... 1011 .1.0 .... \
vm=%vm_dp vn=%vn_dp vd=%vd_dp
VNMLS_sp ---- 1110 0.01 .... .... 1010 .0.0 .... \
vm=%vm_sp vn=%vn_sp vd=%vd_sp
VNMLS_dp ---- 1110 0.01 .... .... 1011 .0.0 .... \
vm=%vm_dp vn=%vn_dp vd=%vd_dp
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