arm load/store half word fix (Ulrich Hecht)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@785 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/translate.c

@@ -543,7 +543,8 @@ static void disas_arm_insn(DisasContext *s)
                 rn = (insn >> 16) & 0xf;
                 rd = (insn >> 12) & 0xf;
                 gen_movl_T1_reg(s, rn);
-                gen_add_datah_offset(s, insn);
+                if (insn & (1 << 24))
+                    gen_add_datah_offset(s, insn);
                 if (insn & (1 << 20)) {
                     /* load */
                     switch(sh) {