Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
openeuler
qemu
提交
b357f902
Q
qemu
项目概览
openeuler
/
qemu
通知
10
Star
0
Fork
0
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
0
列表
看板
标记
里程碑
合并请求
0
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
Q
qemu
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
0
Issue
0
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
提交
Issue看板
体验新版 GitCode,发现更多精彩内容 >>
提交
b357f902
编写于
3月 06, 2014
作者:
R
Richard Henderson
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
tcg-sparc: Hoist common argument loads in tcg_out_op
Signed-off-by:
N
Richard Henderson
<
rth@twiddle.net
>
上级
98b90bab
变更
1
隐藏空白更改
内联
并排
Showing
1 changed file
with
60 addition
and
63 deletion
+60
-63
tcg/sparc/tcg-target.c
tcg/sparc/tcg-target.c
+60
-63
未找到文件。
tcg/sparc/tcg-target.c
浏览文件 @
b357f902
...
...
@@ -1142,49 +1142,56 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr,
#endif
/* CONFIG_SOFTMMU */
}
static
inline
void
tcg_out_op
(
TCGContext
*
s
,
TCGOpcode
opc
,
const
TCGArg
*
args
,
const
int
*
const_args
)
static
void
tcg_out_op
(
TCGContext
*
s
,
TCGOpcode
opc
,
const
TCGArg
args
[
TCG_MAX_OP_ARGS
],
const
int
const_args
[
TCG_MAX_OP_ARGS
])
{
int
c
;
TCGArg
a0
,
a1
,
a2
;
int
c
,
c2
;
/* Hoist the loads of the most common arguments. */
a0
=
args
[
0
];
a1
=
args
[
1
];
a2
=
args
[
2
];
c2
=
const_args
[
2
];
switch
(
opc
)
{
case
INDEX_op_exit_tb
:
if
(
check_fit_ptr
(
a
rgs
[
0
]
,
13
))
{
if
(
check_fit_ptr
(
a
0
,
13
))
{
tcg_out_arithi
(
s
,
TCG_REG_G0
,
TCG_REG_I7
,
8
,
RETURN
);
tcg_out_movi_imm13
(
s
,
TCG_REG_O0
,
a
rgs
[
0
]
);
tcg_out_movi_imm13
(
s
,
TCG_REG_O0
,
a
0
);
}
else
{
tcg_out_movi
(
s
,
TCG_TYPE_PTR
,
TCG_REG_I0
,
a
rgs
[
0
]
&
~
0x3ff
);
tcg_out_movi
(
s
,
TCG_TYPE_PTR
,
TCG_REG_I0
,
a
0
&
~
0x3ff
);
tcg_out_arithi
(
s
,
TCG_REG_G0
,
TCG_REG_I7
,
8
,
RETURN
);
tcg_out_arithi
(
s
,
TCG_REG_O0
,
TCG_REG_O0
,
args
[
0
]
&
0x3ff
,
ARITH_OR
);
tcg_out_arithi
(
s
,
TCG_REG_O0
,
TCG_REG_O0
,
a0
&
0x3ff
,
ARITH_OR
);
}
break
;
case
INDEX_op_goto_tb
:
if
(
s
->
tb_jmp_offset
)
{
/* direct jump method */
uint32_t
old_insn
=
*
(
uint32_t
*
)
s
->
code_ptr
;
s
->
tb_jmp_offset
[
a
rgs
[
0
]
]
=
s
->
code_ptr
-
s
->
code_buf
;
s
->
tb_jmp_offset
[
a
0
]
=
s
->
code_ptr
-
s
->
code_buf
;
/* Make sure to preserve links during retranslation. */
tcg_out32
(
s
,
CALL
|
(
old_insn
&
~
INSN_OP
(
-
1
)));
}
else
{
/* indirect jump method */
tcg_out_ld_ptr
(
s
,
TCG_REG_T1
,
(
uintptr_t
)(
s
->
tb_next
+
a
rgs
[
0
]
));
tcg_out_ld_ptr
(
s
,
TCG_REG_T1
,
(
uintptr_t
)(
s
->
tb_next
+
a
0
));
tcg_out_arithi
(
s
,
TCG_REG_G0
,
TCG_REG_T1
,
0
,
JMPL
);
}
tcg_out_nop
(
s
);
s
->
tb_next_offset
[
a
rgs
[
0
]
]
=
s
->
code_ptr
-
s
->
code_buf
;
s
->
tb_next_offset
[
a
0
]
=
s
->
code_ptr
-
s
->
code_buf
;
break
;
case
INDEX_op_call
:
if
(
const_args
[
0
])
{
tcg_out_calli
(
s
,
a
rgs
[
0
]
);
tcg_out_calli
(
s
,
a
0
);
}
else
{
tcg_out_arithi
(
s
,
TCG_REG_O7
,
a
rgs
[
0
]
,
0
,
JMPL
);
tcg_out_arithi
(
s
,
TCG_REG_O7
,
a
0
,
0
,
JMPL
);
}
/* delay slot */
tcg_out_nop
(
s
);
break
;
case
INDEX_op_br
:
tcg_out_bpcc
(
s
,
COND_A
,
BPCC_PT
,
a
rgs
[
0
]
);
tcg_out_bpcc
(
s
,
COND_A
,
BPCC_PT
,
a
0
);
tcg_out_nop
(
s
);
break
;
...
...
@@ -1193,30 +1200,30 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
glue(glue(case INDEX_op_, x), _i64)
OP_32_64
(
ld8u
)
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
LDUB
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
LDUB
);
break
;
OP_32_64
(
ld8s
)
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
LDSB
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
LDSB
);
break
;
OP_32_64
(
ld16u
)
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
LDUH
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
LDUH
);
break
;
OP_32_64
(
ld16s
)
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
LDSH
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
LDSH
);
break
;
case
INDEX_op_ld_i32
:
case
INDEX_op_ld32u_i64
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
LDUW
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
LDUW
);
break
;
OP_32_64
(
st8
)
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
STB
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
STB
);
break
;
OP_32_64
(
st16
)
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
STH
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
STH
);
break
;
case
INDEX_op_st_i32
:
case
INDEX_op_st32_i64
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
STW
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
STW
);
break
;
OP_32_64
(
add
)
:
c
=
ARITH_ADD
;
...
...
@@ -1243,7 +1250,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
c
=
SHIFT_SLL
;
do_shift32:
/* Limit immediate shift count lest we create an illegal insn. */
tcg_out_arithc
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
&
31
,
const_args
[
2
]
,
c
);
tcg_out_arithc
(
s
,
a
0
,
a1
,
a2
&
31
,
c2
,
c
);
break
;
case
INDEX_op_shr_i32
:
c
=
SHIFT_SRL
;
...
...
@@ -1263,34 +1270,29 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
goto
gen_arith1
;
case
INDEX_op_div_i32
:
tcg_out_div32
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
],
const_args
[
2
]
,
0
);
tcg_out_div32
(
s
,
a
0
,
a1
,
a2
,
c2
,
0
);
break
;
case
INDEX_op_divu_i32
:
tcg_out_div32
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
],
const_args
[
2
]
,
1
);
tcg_out_div32
(
s
,
a
0
,
a1
,
a2
,
c2
,
1
);
break
;
case
INDEX_op_brcond_i32
:
tcg_out_brcond_i32
(
s
,
args
[
2
],
args
[
0
],
args
[
1
],
const_args
[
1
],
args
[
3
]);
tcg_out_brcond_i32
(
s
,
a2
,
a0
,
a1
,
const_args
[
1
],
args
[
3
]);
break
;
case
INDEX_op_setcond_i32
:
tcg_out_setcond_i32
(
s
,
args
[
3
],
args
[
0
],
args
[
1
],
args
[
2
],
const_args
[
2
]);
tcg_out_setcond_i32
(
s
,
args
[
3
],
a0
,
a1
,
a2
,
c2
);
break
;
case
INDEX_op_movcond_i32
:
tcg_out_movcond_i32
(
s
,
args
[
5
],
args
[
0
],
args
[
1
],
args
[
2
],
const_args
[
2
],
args
[
3
],
const_args
[
3
]);
tcg_out_movcond_i32
(
s
,
args
[
5
],
a0
,
a1
,
a2
,
c2
,
args
[
3
],
const_args
[
3
]);
break
;
case
INDEX_op_add2_i32
:
tcg_out_addsub2
(
s
,
args
[
0
],
args
[
1
],
args
[
2
],
args
[
3
],
args
[
4
],
const_args
[
4
],
args
[
5
],
const_args
[
5
],
ARITH_ADDCC
,
ARITH_ADDX
);
tcg_out_addsub2
(
s
,
a0
,
a1
,
a2
,
args
[
3
],
args
[
4
],
const_args
[
4
],
args
[
5
],
const_args
[
5
],
ARITH_ADDCC
,
ARITH_ADDX
);
break
;
case
INDEX_op_sub2_i32
:
tcg_out_addsub2
(
s
,
args
[
0
],
args
[
1
],
args
[
2
],
args
[
3
],
args
[
4
],
const_args
[
4
],
args
[
5
],
const_args
[
5
],
ARITH_SUBCC
,
ARITH_SUBX
);
tcg_out_addsub2
(
s
,
a0
,
a1
,
a2
,
args
[
3
],
args
[
4
],
const_args
[
4
],
args
[
5
],
const_args
[
5
],
ARITH_SUBCC
,
ARITH_SUBX
);
break
;
case
INDEX_op_mulu2_i32
:
c
=
ARITH_UMUL
;
...
...
@@ -1300,41 +1302,39 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
do_mul2:
/* The 32-bit multiply insns produce a full 64-bit result. If the
destination register can hold it, we can avoid the slower RDY. */
tcg_out_arithc
(
s
,
a
rgs
[
0
],
args
[
2
]
,
args
[
3
],
const_args
[
3
],
c
);
if
(
SPARC64
||
a
rgs
[
0
]
<=
TCG_REG_O7
)
{
tcg_out_arithi
(
s
,
a
rgs
[
1
],
args
[
0
]
,
32
,
SHIFT_SRLX
);
tcg_out_arithc
(
s
,
a
0
,
a2
,
args
[
3
],
const_args
[
3
],
c
);
if
(
SPARC64
||
a
0
<=
TCG_REG_O7
)
{
tcg_out_arithi
(
s
,
a
1
,
a0
,
32
,
SHIFT_SRLX
);
}
else
{
tcg_out_rdy
(
s
,
a
rgs
[
1
]
);
tcg_out_rdy
(
s
,
a
1
);
}
break
;
case
INDEX_op_qemu_ld_i32
:
tcg_out_qemu_ld
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
args
[
3
],
false
);
tcg_out_qemu_ld
(
s
,
a
0
,
a1
,
a2
,
args
[
3
],
false
);
break
;
case
INDEX_op_qemu_ld_i64
:
tcg_out_qemu_ld
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
args
[
3
],
true
);
tcg_out_qemu_ld
(
s
,
a
0
,
a1
,
a2
,
args
[
3
],
true
);
break
;
case
INDEX_op_qemu_st_i32
:
tcg_out_qemu_st
(
s
,
args
[
0
],
args
[
1
],
args
[
2
],
args
[
3
]);
break
;
case
INDEX_op_qemu_st_i64
:
tcg_out_qemu_st
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
args
[
3
]);
tcg_out_qemu_st
(
s
,
a
0
,
a1
,
a2
,
args
[
3
]);
break
;
case
INDEX_op_ld32s_i64
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
LDSW
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
LDSW
);
break
;
case
INDEX_op_ld_i64
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
LDX
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
LDX
);
break
;
case
INDEX_op_st_i64
:
tcg_out_ldst
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
STX
);
tcg_out_ldst
(
s
,
a
0
,
a1
,
a2
,
STX
);
break
;
case
INDEX_op_shl_i64
:
c
=
SHIFT_SLLX
;
do_shift64:
/* Limit immediate shift count lest we create an illegal insn. */
tcg_out_arithc
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
&
63
,
const_args
[
2
]
,
c
);
tcg_out_arithc
(
s
,
a
0
,
a1
,
a2
&
63
,
c2
,
c
);
break
;
case
INDEX_op_shr_i64
:
c
=
SHIFT_SRLX
;
...
...
@@ -1352,38 +1352,35 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
c
=
ARITH_UDIVX
;
goto
gen_arith
;
case
INDEX_op_ext32s_i64
:
tcg_out_arithi
(
s
,
a
rgs
[
0
],
args
[
1
]
,
0
,
SHIFT_SRA
);
tcg_out_arithi
(
s
,
a
0
,
a1
,
0
,
SHIFT_SRA
);
break
;
case
INDEX_op_ext32u_i64
:
tcg_out_arithi
(
s
,
a
rgs
[
0
],
args
[
1
]
,
0
,
SHIFT_SRL
);
tcg_out_arithi
(
s
,
a
0
,
a1
,
0
,
SHIFT_SRL
);
break
;
case
INDEX_op_trunc_shr_i32
:
if
(
a
rgs
[
2
]
==
0
)
{
tcg_out_mov
(
s
,
TCG_TYPE_I32
,
a
rgs
[
0
],
args
[
1
]
);
if
(
a
2
==
0
)
{
tcg_out_mov
(
s
,
TCG_TYPE_I32
,
a
0
,
a1
);
}
else
{
tcg_out_arithi
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
]
,
SHIFT_SRLX
);
tcg_out_arithi
(
s
,
a
0
,
a1
,
a2
,
SHIFT_SRLX
);
}
break
;
case
INDEX_op_brcond_i64
:
tcg_out_brcond_i64
(
s
,
args
[
2
],
args
[
0
],
args
[
1
],
const_args
[
1
],
args
[
3
]);
tcg_out_brcond_i64
(
s
,
a2
,
a0
,
a1
,
const_args
[
1
],
args
[
3
]);
break
;
case
INDEX_op_setcond_i64
:
tcg_out_setcond_i64
(
s
,
args
[
3
],
args
[
0
],
args
[
1
],
args
[
2
],
const_args
[
2
]);
tcg_out_setcond_i64
(
s
,
args
[
3
],
a0
,
a1
,
a2
,
c2
);
break
;
case
INDEX_op_movcond_i64
:
tcg_out_movcond_i64
(
s
,
args
[
5
],
args
[
0
],
args
[
1
],
args
[
2
],
const_args
[
2
],
args
[
3
],
const_args
[
3
]);
tcg_out_movcond_i64
(
s
,
args
[
5
],
a0
,
a1
,
a2
,
c2
,
args
[
3
],
const_args
[
3
]);
break
;
gen_arith:
tcg_out_arithc
(
s
,
a
rgs
[
0
],
args
[
1
],
args
[
2
],
const_args
[
2
]
,
c
);
tcg_out_arithc
(
s
,
a
0
,
a1
,
a2
,
c2
,
c
);
break
;
gen_arith1:
tcg_out_arithc
(
s
,
a
rgs
[
0
],
TCG_REG_G0
,
args
[
1
]
,
const_args
[
1
],
c
);
tcg_out_arithc
(
s
,
a
0
,
TCG_REG_G0
,
a1
,
const_args
[
1
],
c
);
break
;
case
INDEX_op_mov_i64
:
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录