提交 b1b104ed 编写于 作者: P Peter Maydell

hw/timer/exynos4210_pwm.c: Switch to transaction-based ptimer API

Switch the exynos4210_pwm code away from bottom-half based ptimers to
the new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
Message-id: 20191008171740.9679-15-peter.maydell@linaro.org
上级 6c27ee94
...@@ -25,7 +25,6 @@ ...@@ -25,7 +25,6 @@
#include "hw/sysbus.h" #include "hw/sysbus.h"
#include "migration/vmstate.h" #include "migration/vmstate.h"
#include "qemu/timer.h" #include "qemu/timer.h"
#include "qemu/main-loop.h"
#include "qemu/module.h" #include "qemu/module.h"
#include "hw/ptimer.h" #include "hw/ptimer.h"
...@@ -150,7 +149,9 @@ static const VMStateDescription vmstate_exynos4210_pwm_state = { ...@@ -150,7 +149,9 @@ static const VMStateDescription vmstate_exynos4210_pwm_state = {
}; };
/* /*
* PWM update frequency * PWM update frequency.
* Must be called within a ptimer_transaction_begin/commit block
* for s->timer[id].ptimer.
*/ */
static void exynos4210_pwm_update_freq(Exynos4210PWMState *s, uint32_t id) static void exynos4210_pwm_update_freq(Exynos4210PWMState *s, uint32_t id)
{ {
...@@ -281,12 +282,15 @@ static void exynos4210_pwm_write(void *opaque, hwaddr offset, ...@@ -281,12 +282,15 @@ static void exynos4210_pwm_write(void *opaque, hwaddr offset,
/* update timers frequencies */ /* update timers frequencies */
for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) { for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {
ptimer_transaction_begin(s->timer[i].ptimer);
exynos4210_pwm_update_freq(s, s->timer[i].id); exynos4210_pwm_update_freq(s, s->timer[i].id);
ptimer_transaction_commit(s->timer[i].ptimer);
} }
break; break;
case TCON: case TCON:
for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) { for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {
ptimer_transaction_begin(s->timer[i].ptimer);
if ((value & TCON_TIMER_MANUAL_UPD(i)) > if ((value & TCON_TIMER_MANUAL_UPD(i)) >
(s->reg_tcon & TCON_TIMER_MANUAL_UPD(i))) { (s->reg_tcon & TCON_TIMER_MANUAL_UPD(i))) {
/* /*
...@@ -315,6 +319,7 @@ static void exynos4210_pwm_write(void *opaque, hwaddr offset, ...@@ -315,6 +319,7 @@ static void exynos4210_pwm_write(void *opaque, hwaddr offset,
ptimer_stop(s->timer[i].ptimer); ptimer_stop(s->timer[i].ptimer);
DPRINTF("stop timer %d\n", i); DPRINTF("stop timer %d\n", i);
} }
ptimer_transaction_commit(s->timer[i].ptimer);
} }
s->reg_tcon = value; s->reg_tcon = value;
break; break;
...@@ -369,8 +374,10 @@ static void exynos4210_pwm_reset(DeviceState *d) ...@@ -369,8 +374,10 @@ static void exynos4210_pwm_reset(DeviceState *d)
s->timer[i].reg_tcmpb = 0; s->timer[i].reg_tcmpb = 0;
s->timer[i].reg_tcntb = 0; s->timer[i].reg_tcntb = 0;
ptimer_transaction_begin(s->timer[i].ptimer);
exynos4210_pwm_update_freq(s, s->timer[i].id); exynos4210_pwm_update_freq(s, s->timer[i].id);
ptimer_stop(s->timer[i].ptimer); ptimer_stop(s->timer[i].ptimer);
ptimer_transaction_commit(s->timer[i].ptimer);
} }
} }
...@@ -388,12 +395,12 @@ static void exynos4210_pwm_init(Object *obj) ...@@ -388,12 +395,12 @@ static void exynos4210_pwm_init(Object *obj)
Exynos4210PWMState *s = EXYNOS4210_PWM(obj); Exynos4210PWMState *s = EXYNOS4210_PWM(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj);
int i; int i;
QEMUBH *bh;
for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) { for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {
bh = qemu_bh_new(exynos4210_pwm_tick, &s->timer[i]);
sysbus_init_irq(dev, &s->timer[i].irq); sysbus_init_irq(dev, &s->timer[i].irq);
s->timer[i].ptimer = ptimer_init_with_bh(bh, PTIMER_POLICY_DEFAULT); s->timer[i].ptimer = ptimer_init(exynos4210_pwm_tick,
&s->timer[i],
PTIMER_POLICY_DEFAULT);
s->timer[i].id = i; s->timer[i].id = i;
s->timer[i].parent = s; s->timer[i].parent = s;
} }
......
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