target-arm: A64: add support for add, addi, sub, subi
Implement the non-carry forms of addition and subtraction (immediate, extended register and shifted register). This includes the code to calculate NZCV if the instruction calls for setting the flags. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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