提交 af39bc8c 编写于 作者: A Aleksandar Markovic 提交者: Leon Alrae

softfloat: Implement run-time-configurable meaning of signaling NaN bit

This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.

Background:

In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).

Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.

Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.

QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.

On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.

The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.

IMPORTANT:

This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.

Further break down of changes:

  1) Added field snan_bit_is_one to the structure float_status, and
     correspondent setter function set_snan_bit_is_one().

  2) Constants <float16|float32|float64|floatx80|float128>_default_nan
     (used both internally and externally) converted to functions
     <float16|float32|float64|floatx80|float128>_default_nan(float_status*).
     This is necessary since they are dependent on signaling bit meaning.
     At the same time, for the sake of code cleanup and simplicity, constants
     <floatx80|float128>_default_nan_<low|high> (used only internally within
     SoftFloat library) are removed, as not needed.

  3) Added a float_status* argument to SoftFloat library functions
     XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
     XXX_maybe_silence_nan(XXX a_). This argument must be present in
     order to enable correct invocation of new version of functions
     XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
     here)

  4) Updated code for all platforms to reflect changes in SoftFloat library.
     This change is twofolds: it includes modifications of SoftFloat library
     functions invocations, and an addition of invocation of function
     set_snan_bit_is_one() during CPU initialization, with arguments that
     are appropriate for each particular platform. It was established that
     all platforms zero their main CPU data structures, so snan_bit_is_one(0)
     in appropriate places is not added, as it is not needed.

[1] "IEEE Standard for Floating-Point Arithmetic",
    IEEE Computer Society, August 29, 2008.
Signed-off-by: NThomas Schwinge <thomas@codesourcery.com>
Signed-off-by: NMaciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: NBastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
Tested-by: NLeon Alrae <leon.alrae@imgtec.com>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
 * cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
上级 c7288767
此差异已折叠。
此差异已折叠。
...@@ -205,6 +205,7 @@ typedef struct float_status { ...@@ -205,6 +205,7 @@ typedef struct float_status {
/* should denormalised inputs go to zero and set the input_denormal flag? */ /* should denormalised inputs go to zero and set the input_denormal flag? */
flag flush_inputs_to_zero; flag flush_inputs_to_zero;
flag default_nan_mode; flag default_nan_mode;
flag snan_bit_is_one;
} float_status; } float_status;
static inline void set_float_detect_tininess(int val, float_status *status) static inline void set_float_detect_tininess(int val, float_status *status)
...@@ -236,6 +237,10 @@ static inline void set_default_nan_mode(flag val, float_status *status) ...@@ -236,6 +237,10 @@ static inline void set_default_nan_mode(flag val, float_status *status)
{ {
status->default_nan_mode = val; status->default_nan_mode = val;
} }
static inline void set_snan_bit_is_one(flag val, float_status *status)
{
status->snan_bit_is_one = val;
}
static inline int get_float_detect_tininess(float_status *status) static inline int get_float_detect_tininess(float_status *status)
{ {
return status->float_detect_tininess; return status->float_detect_tininess;
...@@ -342,9 +347,9 @@ float64 float16_to_float64(float16 a, flag ieee, float_status *status); ...@@ -342,9 +347,9 @@ float64 float16_to_float64(float16 a, flag ieee, float_status *status);
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| Software half-precision operations. | Software half-precision operations.
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
int float16_is_quiet_nan( float16 ); int float16_is_quiet_nan(float16, float_status *status);
int float16_is_signaling_nan( float16 ); int float16_is_signaling_nan(float16, float_status *status);
float16 float16_maybe_silence_nan( float16 ); float16 float16_maybe_silence_nan(float16, float_status *status);
static inline int float16_is_any_nan(float16 a) static inline int float16_is_any_nan(float16 a)
{ {
...@@ -354,7 +359,7 @@ static inline int float16_is_any_nan(float16 a) ...@@ -354,7 +359,7 @@ static inline int float16_is_any_nan(float16 a)
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| The pattern for a default generated half-precision NaN. | The pattern for a default generated half-precision NaN.
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern const float16 float16_default_nan; float16 float16_default_nan(float_status *status);
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| Software IEC/IEEE single-precision conversion routines. | Software IEC/IEEE single-precision conversion routines.
...@@ -404,9 +409,9 @@ float32 float32_minnum(float32, float32, float_status *status); ...@@ -404,9 +409,9 @@ float32 float32_minnum(float32, float32, float_status *status);
float32 float32_maxnum(float32, float32, float_status *status); float32 float32_maxnum(float32, float32, float_status *status);
float32 float32_minnummag(float32, float32, float_status *status); float32 float32_minnummag(float32, float32, float_status *status);
float32 float32_maxnummag(float32, float32, float_status *status); float32 float32_maxnummag(float32, float32, float_status *status);
int float32_is_quiet_nan( float32 ); int float32_is_quiet_nan(float32, float_status *status);
int float32_is_signaling_nan( float32 ); int float32_is_signaling_nan(float32, float_status *status);
float32 float32_maybe_silence_nan( float32 ); float32 float32_maybe_silence_nan(float32, float_status *status);
float32 float32_scalbn(float32, int, float_status *status); float32 float32_scalbn(float32, int, float_status *status);
static inline float32 float32_abs(float32 a) static inline float32 float32_abs(float32 a)
...@@ -466,7 +471,7 @@ static inline float32 float32_set_sign(float32 a, int sign) ...@@ -466,7 +471,7 @@ static inline float32 float32_set_sign(float32 a, int sign)
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| The pattern for a default generated single-precision NaN. | The pattern for a default generated single-precision NaN.
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern const float32 float32_default_nan; float32 float32_default_nan(float_status *status);
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision conversion routines. | Software IEC/IEEE double-precision conversion routines.
...@@ -516,9 +521,9 @@ float64 float64_minnum(float64, float64, float_status *status); ...@@ -516,9 +521,9 @@ float64 float64_minnum(float64, float64, float_status *status);
float64 float64_maxnum(float64, float64, float_status *status); float64 float64_maxnum(float64, float64, float_status *status);
float64 float64_minnummag(float64, float64, float_status *status); float64 float64_minnummag(float64, float64, float_status *status);
float64 float64_maxnummag(float64, float64, float_status *status); float64 float64_maxnummag(float64, float64, float_status *status);
int float64_is_quiet_nan( float64 a ); int float64_is_quiet_nan(float64 a, float_status *status);
int float64_is_signaling_nan( float64 ); int float64_is_signaling_nan(float64, float_status *status);
float64 float64_maybe_silence_nan( float64 ); float64 float64_maybe_silence_nan(float64, float_status *status);
float64 float64_scalbn(float64, int, float_status *status); float64 float64_scalbn(float64, int, float_status *status);
static inline float64 float64_abs(float64 a) static inline float64 float64_abs(float64 a)
...@@ -578,7 +583,7 @@ static inline float64 float64_set_sign(float64 a, int sign) ...@@ -578,7 +583,7 @@ static inline float64 float64_set_sign(float64 a, int sign)
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| The pattern for a default generated double-precision NaN. | The pattern for a default generated double-precision NaN.
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern const float64 float64_default_nan; float64 float64_default_nan(float_status *status);
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| Software IEC/IEEE extended double-precision conversion routines. | Software IEC/IEEE extended double-precision conversion routines.
...@@ -611,9 +616,9 @@ int floatx80_lt_quiet(floatx80, floatx80, float_status *status); ...@@ -611,9 +616,9 @@ int floatx80_lt_quiet(floatx80, floatx80, float_status *status);
int floatx80_unordered_quiet(floatx80, floatx80, float_status *status); int floatx80_unordered_quiet(floatx80, floatx80, float_status *status);
int floatx80_compare(floatx80, floatx80, float_status *status); int floatx80_compare(floatx80, floatx80, float_status *status);
int floatx80_compare_quiet(floatx80, floatx80, float_status *status); int floatx80_compare_quiet(floatx80, floatx80, float_status *status);
int floatx80_is_quiet_nan( floatx80 ); int floatx80_is_quiet_nan(floatx80, float_status *status);
int floatx80_is_signaling_nan( floatx80 ); int floatx80_is_signaling_nan(floatx80, float_status *status);
floatx80 floatx80_maybe_silence_nan( floatx80 ); floatx80 floatx80_maybe_silence_nan(floatx80, float_status *status);
floatx80 floatx80_scalbn(floatx80, int, float_status *status); floatx80 floatx80_scalbn(floatx80, int, float_status *status);
static inline floatx80 floatx80_abs(floatx80 a) static inline floatx80 floatx80_abs(floatx80 a)
...@@ -663,7 +668,7 @@ static inline int floatx80_is_any_nan(floatx80 a) ...@@ -663,7 +668,7 @@ static inline int floatx80_is_any_nan(floatx80 a)
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| The pattern for a default generated extended double-precision NaN. | The pattern for a default generated extended double-precision NaN.
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern const floatx80 floatx80_default_nan; floatx80 floatx80_default_nan(float_status *status);
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| Software IEC/IEEE quadruple-precision conversion routines. | Software IEC/IEEE quadruple-precision conversion routines.
...@@ -696,9 +701,9 @@ int float128_lt_quiet(float128, float128, float_status *status); ...@@ -696,9 +701,9 @@ int float128_lt_quiet(float128, float128, float_status *status);
int float128_unordered_quiet(float128, float128, float_status *status); int float128_unordered_quiet(float128, float128, float_status *status);
int float128_compare(float128, float128, float_status *status); int float128_compare(float128, float128, float_status *status);
int float128_compare_quiet(float128, float128, float_status *status); int float128_compare_quiet(float128, float128, float_status *status);
int float128_is_quiet_nan( float128 ); int float128_is_quiet_nan(float128, float_status *status);
int float128_is_signaling_nan( float128 ); int float128_is_signaling_nan(float128, float_status *status);
float128 float128_maybe_silence_nan( float128 ); float128 float128_maybe_silence_nan(float128, float_status *status);
float128 float128_scalbn(float128, int, float_status *status); float128 float128_scalbn(float128, int, float_status *status);
static inline float128 float128_abs(float128 a) static inline float128 float128_abs(float128 a)
...@@ -744,6 +749,6 @@ static inline int float128_is_any_nan(float128 a) ...@@ -744,6 +749,6 @@ static inline int float128_is_any_nan(float128 a)
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
| The pattern for a default generated quadruple-precision NaN. | The pattern for a default generated quadruple-precision NaN.
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern const float128 float128_default_nan; float128 float128_default_nan(float_status *status);
#endif /* !SOFTFLOAT_H */ #endif /* !SOFTFLOAT_H */
...@@ -344,12 +344,12 @@ float32 HELPER(frecpx_f32)(float32 a, void *fpstp) ...@@ -344,12 +344,12 @@ float32 HELPER(frecpx_f32)(float32 a, void *fpstp)
if (float32_is_any_nan(a)) { if (float32_is_any_nan(a)) {
float32 nan = a; float32 nan = a;
if (float32_is_signaling_nan(a)) { if (float32_is_signaling_nan(a, fpst)) {
float_raise(float_flag_invalid, fpst); float_raise(float_flag_invalid, fpst);
nan = float32_maybe_silence_nan(a); nan = float32_maybe_silence_nan(a, fpst);
} }
if (fpst->default_nan_mode) { if (fpst->default_nan_mode) {
nan = float32_default_nan; nan = float32_default_nan(fpst);
} }
return nan; return nan;
} }
...@@ -373,12 +373,12 @@ float64 HELPER(frecpx_f64)(float64 a, void *fpstp) ...@@ -373,12 +373,12 @@ float64 HELPER(frecpx_f64)(float64 a, void *fpstp)
if (float64_is_any_nan(a)) { if (float64_is_any_nan(a)) {
float64 nan = a; float64 nan = a;
if (float64_is_signaling_nan(a)) { if (float64_is_signaling_nan(a, fpst)) {
float_raise(float_flag_invalid, fpst); float_raise(float_flag_invalid, fpst);
nan = float64_maybe_silence_nan(a); nan = float64_maybe_silence_nan(a, fpst);
} }
if (fpst->default_nan_mode) { if (fpst->default_nan_mode) {
nan = float64_default_nan; nan = float64_default_nan(fpst);
} }
return nan; return nan;
} }
...@@ -407,7 +407,7 @@ float32 HELPER(fcvtx_f64_to_f32)(float64 a, CPUARMState *env) ...@@ -407,7 +407,7 @@ float32 HELPER(fcvtx_f64_to_f32)(float64 a, CPUARMState *env)
set_float_rounding_mode(float_round_to_zero, &tstat); set_float_rounding_mode(float_round_to_zero, &tstat);
set_float_exception_flags(0, &tstat); set_float_exception_flags(0, &tstat);
r = float64_to_float32(a, &tstat); r = float64_to_float32(a, &tstat);
r = float32_maybe_silence_nan(r); r = float32_maybe_silence_nan(r, &tstat);
exflags = get_float_exception_flags(&tstat); exflags = get_float_exception_flags(&tstat);
if (exflags & float_flag_inexact) { if (exflags & float_flag_inexact) {
r = make_float32(float32_val(r) | 1); r = make_float32(float32_val(r) | 1);
......
...@@ -8678,7 +8678,7 @@ float64 VFP_HELPER(fcvtd, s)(float32 x, CPUARMState *env) ...@@ -8678,7 +8678,7 @@ float64 VFP_HELPER(fcvtd, s)(float32 x, CPUARMState *env)
/* ARM requires that S<->D conversion of any kind of NaN generates /* ARM requires that S<->D conversion of any kind of NaN generates
* a quiet NaN by forcing the most significant frac bit to 1. * a quiet NaN by forcing the most significant frac bit to 1.
*/ */
return float64_maybe_silence_nan(r); return float64_maybe_silence_nan(r, &env->vfp.fp_status);
} }
float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env) float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env)
...@@ -8687,7 +8687,7 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env) ...@@ -8687,7 +8687,7 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env)
/* ARM requires that S<->D conversion of any kind of NaN generates /* ARM requires that S<->D conversion of any kind of NaN generates
* a quiet NaN by forcing the most significant frac bit to 1. * a quiet NaN by forcing the most significant frac bit to 1.
*/ */
return float32_maybe_silence_nan(r); return float32_maybe_silence_nan(r, &env->vfp.fp_status);
} }
/* VFP3 fixed point conversion. */ /* VFP3 fixed point conversion. */
...@@ -8786,7 +8786,7 @@ static float32 do_fcvt_f16_to_f32(uint32_t a, CPUARMState *env, float_status *s) ...@@ -8786,7 +8786,7 @@ static float32 do_fcvt_f16_to_f32(uint32_t a, CPUARMState *env, float_status *s)
int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
float32 r = float16_to_float32(make_float16(a), ieee, s); float32 r = float16_to_float32(make_float16(a), ieee, s);
if (ieee) { if (ieee) {
return float32_maybe_silence_nan(r); return float32_maybe_silence_nan(r, s);
} }
return r; return r;
} }
...@@ -8796,7 +8796,7 @@ static uint32_t do_fcvt_f32_to_f16(float32 a, CPUARMState *env, float_status *s) ...@@ -8796,7 +8796,7 @@ static uint32_t do_fcvt_f32_to_f16(float32 a, CPUARMState *env, float_status *s)
int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
float16 r = float32_to_float16(a, ieee, s); float16 r = float32_to_float16(a, ieee, s);
if (ieee) { if (ieee) {
r = float16_maybe_silence_nan(r); r = float16_maybe_silence_nan(r, s);
} }
return float16_val(r); return float16_val(r);
} }
...@@ -8826,7 +8826,7 @@ float64 HELPER(vfp_fcvt_f16_to_f64)(uint32_t a, CPUARMState *env) ...@@ -8826,7 +8826,7 @@ float64 HELPER(vfp_fcvt_f16_to_f64)(uint32_t a, CPUARMState *env)
int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
float64 r = float16_to_float64(make_float16(a), ieee, &env->vfp.fp_status); float64 r = float16_to_float64(make_float16(a), ieee, &env->vfp.fp_status);
if (ieee) { if (ieee) {
return float64_maybe_silence_nan(r); return float64_maybe_silence_nan(r, &env->vfp.fp_status);
} }
return r; return r;
} }
...@@ -8836,7 +8836,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, CPUARMState *env) ...@@ -8836,7 +8836,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, CPUARMState *env)
int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
float16 r = float64_to_float16(a, ieee, &env->vfp.fp_status); float16 r = float64_to_float16(a, ieee, &env->vfp.fp_status);
if (ieee) { if (ieee) {
r = float16_maybe_silence_nan(r); r = float16_maybe_silence_nan(r, &env->vfp.fp_status);
} }
return float16_val(r); return float16_val(r);
} }
...@@ -8986,12 +8986,12 @@ float32 HELPER(recpe_f32)(float32 input, void *fpstp) ...@@ -8986,12 +8986,12 @@ float32 HELPER(recpe_f32)(float32 input, void *fpstp)
if (float32_is_any_nan(f32)) { if (float32_is_any_nan(f32)) {
float32 nan = f32; float32 nan = f32;
if (float32_is_signaling_nan(f32)) { if (float32_is_signaling_nan(f32, fpst)) {
float_raise(float_flag_invalid, fpst); float_raise(float_flag_invalid, fpst);
nan = float32_maybe_silence_nan(f32); nan = float32_maybe_silence_nan(f32, fpst);
} }
if (fpst->default_nan_mode) { if (fpst->default_nan_mode) {
nan = float32_default_nan; nan = float32_default_nan(fpst);
} }
return nan; return nan;
} else if (float32_is_infinity(f32)) { } else if (float32_is_infinity(f32)) {
...@@ -9040,12 +9040,12 @@ float64 HELPER(recpe_f64)(float64 input, void *fpstp) ...@@ -9040,12 +9040,12 @@ float64 HELPER(recpe_f64)(float64 input, void *fpstp)
/* Deal with any special cases */ /* Deal with any special cases */
if (float64_is_any_nan(f64)) { if (float64_is_any_nan(f64)) {
float64 nan = f64; float64 nan = f64;
if (float64_is_signaling_nan(f64)) { if (float64_is_signaling_nan(f64, fpst)) {
float_raise(float_flag_invalid, fpst); float_raise(float_flag_invalid, fpst);
nan = float64_maybe_silence_nan(f64); nan = float64_maybe_silence_nan(f64, fpst);
} }
if (fpst->default_nan_mode) { if (fpst->default_nan_mode) {
nan = float64_default_nan; nan = float64_default_nan(fpst);
} }
return nan; return nan;
} else if (float64_is_infinity(f64)) { } else if (float64_is_infinity(f64)) {
...@@ -9147,12 +9147,12 @@ float32 HELPER(rsqrte_f32)(float32 input, void *fpstp) ...@@ -9147,12 +9147,12 @@ float32 HELPER(rsqrte_f32)(float32 input, void *fpstp)
if (float32_is_any_nan(f32)) { if (float32_is_any_nan(f32)) {
float32 nan = f32; float32 nan = f32;
if (float32_is_signaling_nan(f32)) { if (float32_is_signaling_nan(f32, s)) {
float_raise(float_flag_invalid, s); float_raise(float_flag_invalid, s);
nan = float32_maybe_silence_nan(f32); nan = float32_maybe_silence_nan(f32, s);
} }
if (s->default_nan_mode) { if (s->default_nan_mode) {
nan = float32_default_nan; nan = float32_default_nan(s);
} }
return nan; return nan;
} else if (float32_is_zero(f32)) { } else if (float32_is_zero(f32)) {
...@@ -9160,7 +9160,7 @@ float32 HELPER(rsqrte_f32)(float32 input, void *fpstp) ...@@ -9160,7 +9160,7 @@ float32 HELPER(rsqrte_f32)(float32 input, void *fpstp)
return float32_set_sign(float32_infinity, float32_is_neg(f32)); return float32_set_sign(float32_infinity, float32_is_neg(f32));
} else if (float32_is_neg(f32)) { } else if (float32_is_neg(f32)) {
float_raise(float_flag_invalid, s); float_raise(float_flag_invalid, s);
return float32_default_nan; return float32_default_nan(s);
} else if (float32_is_infinity(f32)) { } else if (float32_is_infinity(f32)) {
return float32_zero; return float32_zero;
} }
...@@ -9211,12 +9211,12 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp) ...@@ -9211,12 +9211,12 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
if (float64_is_any_nan(f64)) { if (float64_is_any_nan(f64)) {
float64 nan = f64; float64 nan = f64;
if (float64_is_signaling_nan(f64)) { if (float64_is_signaling_nan(f64, s)) {
float_raise(float_flag_invalid, s); float_raise(float_flag_invalid, s);
nan = float64_maybe_silence_nan(f64); nan = float64_maybe_silence_nan(f64, s);
} }
if (s->default_nan_mode) { if (s->default_nan_mode) {
nan = float64_default_nan; nan = float64_default_nan(s);
} }
return nan; return nan;
} else if (float64_is_zero(f64)) { } else if (float64_is_zero(f64)) {
...@@ -9224,7 +9224,7 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp) ...@@ -9224,7 +9224,7 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
return float64_set_sign(float64_infinity, float64_is_neg(f64)); return float64_set_sign(float64_infinity, float64_is_neg(f64));
} else if (float64_is_neg(f64)) { } else if (float64_is_neg(f64)) {
float_raise(float_flag_invalid, s); float_raise(float_flag_invalid, s);
return float64_default_nan; return float64_default_nan(s);
} else if (float64_is_infinity(f64)) { } else if (float64_is_infinity(f64)) {
return float64_zero; return float64_zero;
} }
......
...@@ -558,10 +558,10 @@ float64 HELPER(sub_cmp_f64)(CPUM68KState *env, float64 a, float64 b) ...@@ -558,10 +558,10 @@ float64 HELPER(sub_cmp_f64)(CPUM68KState *env, float64 a, float64 b)
/* ??? Should flush denormals to zero. */ /* ??? Should flush denormals to zero. */
float64 res; float64 res;
res = float64_sub(a, b, &env->fp_status); res = float64_sub(a, b, &env->fp_status);
if (float64_is_quiet_nan(res)) { if (float64_is_quiet_nan(res, &env->fp_status)) {
/* +/-inf compares equal against itself, but sub returns nan. */ /* +/-inf compares equal against itself, but sub returns nan. */
if (!float64_is_quiet_nan(a) if (!float64_is_quiet_nan(a, &env->fp_status)
&& !float64_is_quiet_nan(b)) { && !float64_is_quiet_nan(b, &env->fp_status)) {
res = float64_zero; res = float64_zero;
if (float64_lt_quiet(a, res, &env->fp_status)) if (float64_lt_quiet(a, res, &env->fp_status))
res = float64_chs(res); res = float64_chs(res);
......
...@@ -288,12 +288,14 @@ uint32_t helper_fcmp_un(CPUMBState *env, uint32_t a, uint32_t b) ...@@ -288,12 +288,14 @@ uint32_t helper_fcmp_un(CPUMBState *env, uint32_t a, uint32_t b)
fa.l = a; fa.l = a;
fb.l = b; fb.l = b;
if (float32_is_signaling_nan(fa.f) || float32_is_signaling_nan(fb.f)) { if (float32_is_signaling_nan(fa.f, &env->fp_status) ||
float32_is_signaling_nan(fb.f, &env->fp_status)) {
update_fpu_flags(env, float_flag_invalid); update_fpu_flags(env, float_flag_invalid);
r = 1; r = 1;
} }
if (float32_is_quiet_nan(fa.f) || float32_is_quiet_nan(fb.f)) { if (float32_is_quiet_nan(fa.f, &env->fp_status) ||
float32_is_quiet_nan(fb.f, &env->fp_status)) {
r = 1; r = 1;
} }
......
...@@ -825,6 +825,11 @@ void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level); ...@@ -825,6 +825,11 @@ void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level);
/* helper.c */ /* helper.c */
int mips_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, int mips_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
int mmu_idx); int mmu_idx);
/* op_helper.c */
uint32_t float_class_s(uint32_t arg, float_status *fst);
uint64_t float_class_d(uint64_t arg, float_status *fst);
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
void r4k_invalidate_tlb (CPUMIPSState *env, int idx, int use_extra); void r4k_invalidate_tlb (CPUMIPSState *env, int idx, int use_extra);
hwaddr cpu_mips_translate_address (CPUMIPSState *env, target_ulong address, hwaddr cpu_mips_translate_address (CPUMIPSState *env, target_ulong address,
......
...@@ -222,8 +222,8 @@ DEF_HELPER_2(float_cvtw_d, i32, env, i64) ...@@ -222,8 +222,8 @@ DEF_HELPER_2(float_cvtw_d, i32, env, i64)
DEF_HELPER_3(float_addr_ps, i64, env, i64, i64) DEF_HELPER_3(float_addr_ps, i64, env, i64, i64)
DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64) DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64)
DEF_HELPER_FLAGS_1(float_class_s, TCG_CALL_NO_RWG_SE, i32, i32) DEF_HELPER_FLAGS_2(float_class_s, TCG_CALL_NO_RWG_SE, i32, env, i32)
DEF_HELPER_FLAGS_1(float_class_d, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_2(float_class_d, TCG_CALL_NO_RWG_SE, i64, env, i64)
#define FOP_PROTO(op) \ #define FOP_PROTO(op) \
DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \
......
...@@ -1495,11 +1495,11 @@ MSA_UNOP_DF(pcnt) ...@@ -1495,11 +1495,11 @@ MSA_UNOP_DF(pcnt)
#define FLOAT_ONE32 make_float32(0x3f8 << 20) #define FLOAT_ONE32 make_float32(0x3f8 << 20)
#define FLOAT_ONE64 make_float64(0x3ffULL << 52) #define FLOAT_ONE64 make_float64(0x3ffULL << 52)
#define FLOAT_SNAN16 (float16_default_nan ^ 0x0220) #define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220)
/* 0x7c20 */ /* 0x7c20 */
#define FLOAT_SNAN32 (float32_default_nan ^ 0x00400020) #define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020)
/* 0x7f800020 */ /* 0x7f800020 */
#define FLOAT_SNAN64 (float64_default_nan ^ 0x0008000000000020ULL) #define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL)
/* 0x7ff0000000000020 */ /* 0x7ff0000000000020 */
static inline void clear_msacsr_cause(CPUMIPSState *env) static inline void clear_msacsr_cause(CPUMIPSState *env)
...@@ -1612,7 +1612,7 @@ static inline float16 float16_from_float32(int32_t a, flag ieee, ...@@ -1612,7 +1612,7 @@ static inline float16 float16_from_float32(int32_t a, flag ieee,
float16 f_val; float16 f_val;
f_val = float32_to_float16((float32)a, ieee, status); f_val = float32_to_float16((float32)a, ieee, status);
f_val = float16_maybe_silence_nan(f_val); f_val = float16_maybe_silence_nan(f_val, status);
return a < 0 ? (f_val | (1 << 15)) : f_val; return a < 0 ? (f_val | (1 << 15)) : f_val;
} }
...@@ -1622,7 +1622,7 @@ static inline float32 float32_from_float64(int64_t a, float_status *status) ...@@ -1622,7 +1622,7 @@ static inline float32 float32_from_float64(int64_t a, float_status *status)
float32 f_val; float32 f_val;
f_val = float64_to_float32((float64)a, status); f_val = float64_to_float32((float64)a, status);
f_val = float32_maybe_silence_nan(f_val); f_val = float32_maybe_silence_nan(f_val, status);
return a < 0 ? (f_val | (1 << 31)) : f_val; return a < 0 ? (f_val | (1 << 31)) : f_val;
} }
...@@ -1633,7 +1633,7 @@ static inline float32 float32_from_float16(int16_t a, flag ieee, ...@@ -1633,7 +1633,7 @@ static inline float32 float32_from_float16(int16_t a, flag ieee,
float32 f_val; float32 f_val;
f_val = float16_to_float32((float16)a, ieee, status); f_val = float16_to_float32((float16)a, ieee, status);
f_val = float32_maybe_silence_nan(f_val); f_val = float32_maybe_silence_nan(f_val, status);
return a < 0 ? (f_val | (1 << 31)) : f_val; return a < 0 ? (f_val | (1 << 31)) : f_val;
} }
...@@ -1643,7 +1643,7 @@ static inline float64 float64_from_float32(int32_t a, float_status *status) ...@@ -1643,7 +1643,7 @@ static inline float64 float64_from_float32(int32_t a, float_status *status)
float64 f_val; float64 f_val;
f_val = float32_to_float64((float64)a, status); f_val = float32_to_float64((float64)a, status);
f_val = float64_maybe_silence_nan(f_val); f_val = float64_maybe_silence_nan(f_val, status);
return a < 0 ? (f_val | (1ULL << 63)) : f_val; return a < 0 ? (f_val | (1ULL << 63)) : f_val;
} }
...@@ -1789,7 +1789,7 @@ static inline int32_t float64_to_q32(float64 a, float_status *status) ...@@ -1789,7 +1789,7 @@ static inline int32_t float64_to_q32(float64 a, float_status *status)
c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \ c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
} \ } \
} while (0) } while (0)
...@@ -2388,7 +2388,7 @@ void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2388,7 +2388,7 @@ void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
} \ } \
} while (0) } while (0)
...@@ -2524,7 +2524,7 @@ void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2524,7 +2524,7 @@ void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
} \ } \
} while (0) } while (0)
...@@ -2643,7 +2643,7 @@ void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2643,7 +2643,7 @@ void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
} \ } \
} while (0) } while (0)
...@@ -2694,7 +2694,7 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2694,7 +2694,7 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \ c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## XBITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c; \
} \ } \
} while (0) } while (0)
...@@ -2731,9 +2731,9 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2731,9 +2731,9 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
msa_move_v(pwd, pwx); msa_move_v(pwd, pwx);
} }
#define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS) \ #define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS) \
!float ## BITS ## _is_any_nan(ARG1) \ !float ## BITS ## _is_any_nan(ARG1) \
&& float ## BITS ## _is_quiet_nan(ARG2) && float ## BITS ## _is_quiet_nan(ARG2, STATUS)
#define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \ #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \
do { \ do { \
...@@ -2745,18 +2745,18 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2745,18 +2745,18 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
c = update_msacsr(env, 0, 0); \ c = update_msacsr(env, 0, 0); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
} \ } \
} while (0) } while (0)
#define FMAXMIN_A(F, G, X, _S, _T, BITS) \ #define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \
do { \ do { \
uint## BITS ##_t S = _S, T = _T; \ uint## BITS ##_t S = _S, T = _T; \
uint## BITS ##_t as, at, xs, xt, xd; \ uint## BITS ##_t as, at, xs, xt, xd; \
if (NUMBER_QNAN_PAIR(S, T, BITS)) { \ if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \
T = S; \ T = S; \
} \ } \
else if (NUMBER_QNAN_PAIR(T, S, BITS)) { \ else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) { \
S = T; \ S = T; \
} \ } \
as = float## BITS ##_abs(S); \ as = float## BITS ##_abs(S); \
...@@ -2770,6 +2770,7 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2770,6 +2770,7 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd, void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
uint32_t ws, uint32_t wt) uint32_t ws, uint32_t wt)
{ {
float_status *status = &env->active_tc.msa_fp_status;
wr_t wx, *pwx = &wx; wr_t wx, *pwx = &wx;
wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr);
...@@ -2781,9 +2782,9 @@ void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2781,9 +2782,9 @@ void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
switch (df) { switch (df) {
case DF_WORD: case DF_WORD:
for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32)) { if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32, status)) {
MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pws->w[i], 32); MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pws->w[i], 32);
} else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32)) { } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32, status)) {
MSA_FLOAT_MAXOP(pwx->w[i], min, pwt->w[i], pwt->w[i], 32); MSA_FLOAT_MAXOP(pwx->w[i], min, pwt->w[i], pwt->w[i], 32);
} else { } else {
MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pwt->w[i], 32); MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pwt->w[i], 32);
...@@ -2792,9 +2793,9 @@ void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2792,9 +2793,9 @@ void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
break; break;
case DF_DOUBLE: case DF_DOUBLE:
for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64)) { if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64, status)) {
MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pws->d[i], 64); MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pws->d[i], 64);
} else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64)) { } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64, status)) {
MSA_FLOAT_MAXOP(pwx->d[i], min, pwt->d[i], pwt->d[i], 64); MSA_FLOAT_MAXOP(pwx->d[i], min, pwt->d[i], pwt->d[i], 64);
} else { } else {
MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pwt->d[i], 64); MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pwt->d[i], 64);
...@@ -2813,6 +2814,7 @@ void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2813,6 +2814,7 @@ void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
uint32_t ws, uint32_t wt) uint32_t ws, uint32_t wt)
{ {
float_status *status = &env->active_tc.msa_fp_status;
wr_t wx, *pwx = &wx; wr_t wx, *pwx = &wx;
wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr);
...@@ -2824,12 +2826,12 @@ void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2824,12 +2826,12 @@ void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
switch (df) { switch (df) {
case DF_WORD: case DF_WORD:
for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
FMAXMIN_A(min, max, pwx->w[i], pws->w[i], pwt->w[i], 32); FMAXMIN_A(min, max, pwx->w[i], pws->w[i], pwt->w[i], 32, status);
} }
break; break;
case DF_DOUBLE: case DF_DOUBLE:
for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
FMAXMIN_A(min, max, pwx->d[i], pws->d[i], pwt->d[i], 64); FMAXMIN_A(min, max, pwx->d[i], pws->d[i], pwt->d[i], 64, status);
} }
break; break;
default: default:
...@@ -2844,6 +2846,7 @@ void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2844,6 +2846,7 @@ void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd, void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
uint32_t ws, uint32_t wt) uint32_t ws, uint32_t wt)
{ {
float_status *status = &env->active_tc.msa_fp_status;
wr_t wx, *pwx = &wx; wr_t wx, *pwx = &wx;
wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr);
...@@ -2855,9 +2858,9 @@ void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2855,9 +2858,9 @@ void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
switch (df) { switch (df) {
case DF_WORD: case DF_WORD:
for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32)) { if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32, status)) {
MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pws->w[i], 32); MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pws->w[i], 32);
} else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32)) { } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32, status)) {
MSA_FLOAT_MAXOP(pwx->w[i], max, pwt->w[i], pwt->w[i], 32); MSA_FLOAT_MAXOP(pwx->w[i], max, pwt->w[i], pwt->w[i], 32);
} else { } else {
MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pwt->w[i], 32); MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pwt->w[i], 32);
...@@ -2866,9 +2869,9 @@ void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2866,9 +2869,9 @@ void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
break; break;
case DF_DOUBLE: case DF_DOUBLE:
for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64)) { if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64, status)) {
MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pws->d[i], 64); MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pws->d[i], 64);
} else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64)) { } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64, status)) {
MSA_FLOAT_MAXOP(pwx->d[i], max, pwt->d[i], pwt->d[i], 64); MSA_FLOAT_MAXOP(pwx->d[i], max, pwt->d[i], pwt->d[i], 64);
} else { } else {
MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pwt->d[i], 64); MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pwt->d[i], 64);
...@@ -2887,6 +2890,7 @@ void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2887,6 +2890,7 @@ void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
uint32_t ws, uint32_t wt) uint32_t ws, uint32_t wt)
{ {
float_status *status = &env->active_tc.msa_fp_status;
wr_t wx, *pwx = &wx; wr_t wx, *pwx = &wx;
wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr);
...@@ -2898,12 +2902,12 @@ void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2898,12 +2902,12 @@ void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
switch (df) { switch (df) {
case DF_WORD: case DF_WORD:
for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
FMAXMIN_A(max, min, pwx->w[i], pws->w[i], pwt->w[i], 32); FMAXMIN_A(max, min, pwx->w[i], pws->w[i], pwt->w[i], 32, status);
} }
break; break;
case DF_DOUBLE: case DF_DOUBLE:
for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
FMAXMIN_A(max, min, pwx->d[i], pws->d[i], pwt->d[i], 64); FMAXMIN_A(max, min, pwx->d[i], pws->d[i], pwt->d[i], 64, status);
} }
break; break;
default: default:
...@@ -2918,16 +2922,18 @@ void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -2918,16 +2922,18 @@ void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df, void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
uint32_t wd, uint32_t ws) uint32_t wd, uint32_t ws)
{ {
float_status* status = &env->active_tc.msa_fp_status;
wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr);
if (df == DF_WORD) { if (df == DF_WORD) {
pwd->w[0] = helper_float_class_s(pws->w[0]); pwd->w[0] = float_class_s(pws->w[0], status);
pwd->w[1] = helper_float_class_s(pws->w[1]); pwd->w[1] = float_class_s(pws->w[1], status);
pwd->w[2] = helper_float_class_s(pws->w[2]); pwd->w[2] = float_class_s(pws->w[2], status);
pwd->w[3] = helper_float_class_s(pws->w[3]); pwd->w[3] = float_class_s(pws->w[3], status);
} else { } else {
pwd->d[0] = helper_float_class_d(pws->d[0]); pwd->d[0] = float_class_d(pws->d[0], status);
pwd->d[1] = helper_float_class_d(pws->d[1]); pwd->d[1] = float_class_d(pws->d[1], status);
} }
} }
...@@ -2941,7 +2947,7 @@ void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df, ...@@ -2941,7 +2947,7 @@ void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \ c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
} else if (float ## BITS ## _is_any_nan(ARG)) { \ } else if (float ## BITS ## _is_any_nan(ARG)) { \
DEST = 0; \ DEST = 0; \
} \ } \
...@@ -3045,12 +3051,12 @@ void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -3045,12 +3051,12 @@ void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
set_float_exception_flags(0, status); \ set_float_exception_flags(0, status); \
DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \ DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \
c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \ c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \
float ## BITS ## _is_quiet_nan(DEST) ? \ float ## BITS ## _is_quiet_nan(DEST, status) ? \
0 : RECIPROCAL_INEXACT, \ 0 : RECIPROCAL_INEXACT, \
IS_DENORMAL(DEST, BITS)); \ IS_DENORMAL(DEST, BITS)); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
} \ } \
} while (0) } while (0)
...@@ -3166,7 +3172,7 @@ void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd, ...@@ -3166,7 +3172,7 @@ void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
\ \
if (get_enabled_exceptions(env, c)) { \ if (get_enabled_exceptions(env, c)) { \
DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
} \ } \
} while (0) } while (0)
......
...@@ -2659,7 +2659,7 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0) ...@@ -2659,7 +2659,7 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0)
uint64_t fdt2; uint64_t fdt2;
fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status); fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status);
fdt2 = float64_maybe_silence_nan(fdt2); fdt2 = float64_maybe_silence_nan(fdt2, &env->active_fpu.fp_status);
update_fcr31(env, GETPC()); update_fcr31(env, GETPC());
return fdt2; return fdt2;
} }
...@@ -2749,7 +2749,7 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0) ...@@ -2749,7 +2749,7 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0)
uint32_t fst2; uint32_t fst2;
fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status); fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status);
fst2 = float32_maybe_silence_nan(fst2); fst2 = float32_maybe_silence_nan(fst2, &env->active_fpu.fp_status);
update_fcr31(env, GETPC()); update_fcr31(env, GETPC());
return fst2; return fst2;
} }
...@@ -3199,11 +3199,12 @@ FLOAT_RINT(rint_d, 64) ...@@ -3199,11 +3199,12 @@ FLOAT_RINT(rint_d, 64)
#define FLOAT_CLASS_POSITIVE_ZERO 0x200 #define FLOAT_CLASS_POSITIVE_ZERO 0x200
#define FLOAT_CLASS(name, bits) \ #define FLOAT_CLASS(name, bits) \
uint ## bits ## _t helper_float_ ## name (uint ## bits ## _t arg) \ uint ## bits ## _t float_ ## name (uint ## bits ## _t arg, \
float_status *status) \
{ \ { \
if (float ## bits ## _is_signaling_nan(arg)) { \ if (float ## bits ## _is_signaling_nan(arg, status)) { \
return FLOAT_CLASS_SIGNALING_NAN; \ return FLOAT_CLASS_SIGNALING_NAN; \
} else if (float ## bits ## _is_quiet_nan(arg)) { \ } else if (float ## bits ## _is_quiet_nan(arg, status)) { \
return FLOAT_CLASS_QUIET_NAN; \ return FLOAT_CLASS_QUIET_NAN; \
} else if (float ## bits ## _is_neg(arg)) { \ } else if (float ## bits ## _is_neg(arg)) { \
if (float ## bits ## _is_infinity(arg)) { \ if (float ## bits ## _is_infinity(arg)) { \
...@@ -3226,6 +3227,12 @@ uint ## bits ## _t helper_float_ ## name (uint ## bits ## _t arg) \ ...@@ -3226,6 +3227,12 @@ uint ## bits ## _t helper_float_ ## name (uint ## bits ## _t arg) \
return FLOAT_CLASS_POSITIVE_NORMAL; \ return FLOAT_CLASS_POSITIVE_NORMAL; \
} \ } \
} \ } \
} \
\
uint ## bits ## _t helper_float_ ## name (CPUMIPSState *env, \
uint ## bits ## _t arg) \
{ \
return float_ ## name(arg, &env->active_fpu.fp_status); \
} }
FLOAT_CLASS(class_s, 32) FLOAT_CLASS(class_s, 32)
......
...@@ -9121,7 +9121,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, ...@@ -9121,7 +9121,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{ {
TCGv_i32 fp0 = tcg_temp_new_i32(); TCGv_i32 fp0 = tcg_temp_new_i32();
gen_load_fpr32(ctx, fp0, fs); gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_class_s(fp0, fp0); gen_helper_float_class_s(fp0, cpu_env, fp0);
gen_store_fpr32(ctx, fp0, fd); gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0); tcg_temp_free_i32(fp0);
} }
...@@ -9619,7 +9619,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, ...@@ -9619,7 +9619,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{ {
TCGv_i64 fp0 = tcg_temp_new_i64(); TCGv_i64 fp0 = tcg_temp_new_i64();
gen_load_fpr64(ctx, fp0, fs); gen_load_fpr64(ctx, fp0, fs);
gen_helper_float_class_d(fp0, fp0); gen_helper_float_class_d(fp0, cpu_env, fp0);
gen_store_fpr64(ctx, fp0, fd); gen_store_fpr64(ctx, fp0, fd);
tcg_temp_free_i64(fp0); tcg_temp_free_i64(fp0);
} }
...@@ -20142,6 +20142,7 @@ void cpu_state_reset(CPUMIPSState *env) ...@@ -20142,6 +20142,7 @@ void cpu_state_reset(CPUMIPSState *env)
env->CP0_PageGrain = env->cpu_model->CP0_PageGrain; env->CP0_PageGrain = env->cpu_model->CP0_PageGrain;
env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0; env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0;
env->active_fpu.fcr31 = env->cpu_model->CP1_fcr31; env->active_fpu.fcr31 = env->cpu_model->CP1_fcr31;
set_snan_bit_is_one(1, &env->active_fpu.fp_status);
env->msair = env->cpu_model->MSAIR; env->msair = env->cpu_model->MSAIR;
env->insn_flags = env->cpu_model->insn_flags; env->insn_flags = env->cpu_model->insn_flags;
......
...@@ -892,4 +892,6 @@ static void msa_reset(CPUMIPSState *env) ...@@ -892,4 +892,6 @@ static void msa_reset(CPUMIPSState *env)
/* clear float_status nan mode */ /* clear float_status nan mode */
set_default_nan_mode(0, &env->active_tc.msa_fp_status); set_default_nan_mode(0, &env->active_tc.msa_fp_status);
set_snan_bit_is_one(1, &env->active_tc.msa_fp_status);
} }
此差异已折叠。
...@@ -267,7 +267,7 @@ uint64_t HELPER(ldeb)(CPUS390XState *env, uint64_t f2) ...@@ -267,7 +267,7 @@ uint64_t HELPER(ldeb)(CPUS390XState *env, uint64_t f2)
{ {
float64 ret = float32_to_float64(f2, &env->fpu_status); float64 ret = float32_to_float64(f2, &env->fpu_status);
handle_exceptions(env, GETPC()); handle_exceptions(env, GETPC());
return float64_maybe_silence_nan(ret); return float64_maybe_silence_nan(ret, &env->fpu_status);
} }
/* convert 128-bit float to 64-bit float */ /* convert 128-bit float to 64-bit float */
...@@ -275,7 +275,7 @@ uint64_t HELPER(ldxb)(CPUS390XState *env, uint64_t ah, uint64_t al) ...@@ -275,7 +275,7 @@ uint64_t HELPER(ldxb)(CPUS390XState *env, uint64_t ah, uint64_t al)
{ {
float64 ret = float128_to_float64(make_float128(ah, al), &env->fpu_status); float64 ret = float128_to_float64(make_float128(ah, al), &env->fpu_status);
handle_exceptions(env, GETPC()); handle_exceptions(env, GETPC());
return float64_maybe_silence_nan(ret); return float64_maybe_silence_nan(ret, &env->fpu_status);
} }
/* convert 64-bit float to 128-bit float */ /* convert 64-bit float to 128-bit float */
...@@ -283,7 +283,7 @@ uint64_t HELPER(lxdb)(CPUS390XState *env, uint64_t f2) ...@@ -283,7 +283,7 @@ uint64_t HELPER(lxdb)(CPUS390XState *env, uint64_t f2)
{ {
float128 ret = float64_to_float128(f2, &env->fpu_status); float128 ret = float64_to_float128(f2, &env->fpu_status);
handle_exceptions(env, GETPC()); handle_exceptions(env, GETPC());
return RET128(float128_maybe_silence_nan(ret)); return RET128(float128_maybe_silence_nan(ret, &env->fpu_status));
} }
/* convert 32-bit float to 128-bit float */ /* convert 32-bit float to 128-bit float */
...@@ -291,7 +291,7 @@ uint64_t HELPER(lxeb)(CPUS390XState *env, uint64_t f2) ...@@ -291,7 +291,7 @@ uint64_t HELPER(lxeb)(CPUS390XState *env, uint64_t f2)
{ {
float128 ret = float32_to_float128(f2, &env->fpu_status); float128 ret = float32_to_float128(f2, &env->fpu_status);
handle_exceptions(env, GETPC()); handle_exceptions(env, GETPC());
return RET128(float128_maybe_silence_nan(ret)); return RET128(float128_maybe_silence_nan(ret, &env->fpu_status));
} }
/* convert 64-bit float to 32-bit float */ /* convert 64-bit float to 32-bit float */
...@@ -299,7 +299,7 @@ uint64_t HELPER(ledb)(CPUS390XState *env, uint64_t f2) ...@@ -299,7 +299,7 @@ uint64_t HELPER(ledb)(CPUS390XState *env, uint64_t f2)
{ {
float32 ret = float64_to_float32(f2, &env->fpu_status); float32 ret = float64_to_float32(f2, &env->fpu_status);
handle_exceptions(env, GETPC()); handle_exceptions(env, GETPC());
return float32_maybe_silence_nan(ret); return float32_maybe_silence_nan(ret, &env->fpu_status);
} }
/* convert 128-bit float to 32-bit float */ /* convert 128-bit float to 32-bit float */
...@@ -307,7 +307,7 @@ uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, uint64_t al) ...@@ -307,7 +307,7 @@ uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, uint64_t al)
{ {
float32 ret = float128_to_float32(make_float128(ah, al), &env->fpu_status); float32 ret = float128_to_float32(make_float128(ah, al), &env->fpu_status);
handle_exceptions(env, GETPC()); handle_exceptions(env, GETPC());
return float32_maybe_silence_nan(ret); return float32_maybe_silence_nan(ret, &env->fpu_status);
} }
/* 32-bit FP compare */ /* 32-bit FP compare */
...@@ -624,7 +624,7 @@ uint64_t HELPER(msdb)(CPUS390XState *env, uint64_t f1, ...@@ -624,7 +624,7 @@ uint64_t HELPER(msdb)(CPUS390XState *env, uint64_t f1,
} }
/* test data class 32-bit */ /* test data class 32-bit */
uint32_t HELPER(tceb)(uint64_t f1, uint64_t m2) uint32_t HELPER(tceb)(CPUS390XState *env, uint64_t f1, uint64_t m2)
{ {
float32 v1 = f1; float32 v1 = f1;
int neg = float32_is_neg(v1); int neg = float32_is_neg(v1);
...@@ -633,7 +633,8 @@ uint32_t HELPER(tceb)(uint64_t f1, uint64_t m2) ...@@ -633,7 +633,8 @@ uint32_t HELPER(tceb)(uint64_t f1, uint64_t m2)
if ((float32_is_zero(v1) && (m2 & (1 << (11-neg)))) || if ((float32_is_zero(v1) && (m2 & (1 << (11-neg)))) ||
(float32_is_infinity(v1) && (m2 & (1 << (5-neg)))) || (float32_is_infinity(v1) && (m2 & (1 << (5-neg)))) ||
(float32_is_any_nan(v1) && (m2 & (1 << (3-neg)))) || (float32_is_any_nan(v1) && (m2 & (1 << (3-neg)))) ||
(float32_is_signaling_nan(v1) && (m2 & (1 << (1-neg))))) { (float32_is_signaling_nan(v1, &env->fpu_status) &&
(m2 & (1 << (1-neg))))) {
cc = 1; cc = 1;
} else if (m2 & (1 << (9-neg))) { } else if (m2 & (1 << (9-neg))) {
/* assume normalized number */ /* assume normalized number */
...@@ -644,7 +645,7 @@ uint32_t HELPER(tceb)(uint64_t f1, uint64_t m2) ...@@ -644,7 +645,7 @@ uint32_t HELPER(tceb)(uint64_t f1, uint64_t m2)
} }
/* test data class 64-bit */ /* test data class 64-bit */
uint32_t HELPER(tcdb)(uint64_t v1, uint64_t m2) uint32_t HELPER(tcdb)(CPUS390XState *env, uint64_t v1, uint64_t m2)
{ {
int neg = float64_is_neg(v1); int neg = float64_is_neg(v1);
uint32_t cc = 0; uint32_t cc = 0;
...@@ -652,7 +653,8 @@ uint32_t HELPER(tcdb)(uint64_t v1, uint64_t m2) ...@@ -652,7 +653,8 @@ uint32_t HELPER(tcdb)(uint64_t v1, uint64_t m2)
if ((float64_is_zero(v1) && (m2 & (1 << (11-neg)))) || if ((float64_is_zero(v1) && (m2 & (1 << (11-neg)))) ||
(float64_is_infinity(v1) && (m2 & (1 << (5-neg)))) || (float64_is_infinity(v1) && (m2 & (1 << (5-neg)))) ||
(float64_is_any_nan(v1) && (m2 & (1 << (3-neg)))) || (float64_is_any_nan(v1) && (m2 & (1 << (3-neg)))) ||
(float64_is_signaling_nan(v1) && (m2 & (1 << (1-neg))))) { (float64_is_signaling_nan(v1, &env->fpu_status) &&
(m2 & (1 << (1-neg))))) {
cc = 1; cc = 1;
} else if (m2 & (1 << (9-neg))) { } else if (m2 & (1 << (9-neg))) {
/* assume normalized number */ /* assume normalized number */
...@@ -663,7 +665,8 @@ uint32_t HELPER(tcdb)(uint64_t v1, uint64_t m2) ...@@ -663,7 +665,8 @@ uint32_t HELPER(tcdb)(uint64_t v1, uint64_t m2)
} }
/* test data class 128-bit */ /* test data class 128-bit */
uint32_t HELPER(tcxb)(uint64_t ah, uint64_t al, uint64_t m2) uint32_t HELPER(tcxb)(CPUS390XState *env, uint64_t ah,
uint64_t al, uint64_t m2)
{ {
float128 v1 = make_float128(ah, al); float128 v1 = make_float128(ah, al);
int neg = float128_is_neg(v1); int neg = float128_is_neg(v1);
...@@ -672,7 +675,8 @@ uint32_t HELPER(tcxb)(uint64_t ah, uint64_t al, uint64_t m2) ...@@ -672,7 +675,8 @@ uint32_t HELPER(tcxb)(uint64_t ah, uint64_t al, uint64_t m2)
if ((float128_is_zero(v1) && (m2 & (1 << (11-neg)))) || if ((float128_is_zero(v1) && (m2 & (1 << (11-neg)))) ||
(float128_is_infinity(v1) && (m2 & (1 << (5-neg)))) || (float128_is_infinity(v1) && (m2 & (1 << (5-neg)))) ||
(float128_is_any_nan(v1) && (m2 & (1 << (3-neg)))) || (float128_is_any_nan(v1) && (m2 & (1 << (3-neg)))) ||
(float128_is_signaling_nan(v1) && (m2 & (1 << (1-neg))))) { (float128_is_signaling_nan(v1, &env->fpu_status) &&
(m2 & (1 << (1-neg))))) {
cc = 1; cc = 1;
} else if (m2 & (1 << (9-neg))) { } else if (m2 & (1 << (9-neg))) {
/* assume normalized number */ /* assume normalized number */
......
...@@ -67,9 +67,9 @@ DEF_HELPER_FLAGS_4(maeb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) ...@@ -67,9 +67,9 @@ DEF_HELPER_FLAGS_4(maeb, TCG_CALL_NO_WG, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_4(madb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_4(madb, TCG_CALL_NO_WG, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_4(mseb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_4(mseb, TCG_CALL_NO_WG, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_4(msdb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_4(msdb, TCG_CALL_NO_WG, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_2(tceb, TCG_CALL_NO_RWG_SE, i32, i64, i64) DEF_HELPER_FLAGS_3(tceb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64)
DEF_HELPER_FLAGS_2(tcdb, TCG_CALL_NO_RWG_SE, i32, i64, i64) DEF_HELPER_FLAGS_3(tcdb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64)
DEF_HELPER_FLAGS_3(tcxb, TCG_CALL_NO_RWG_SE, i32, i64, i64, i64) DEF_HELPER_FLAGS_4(tcxb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64, i64)
DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_2(sqeb, TCG_CALL_NO_WG, i64, env, i64) DEF_HELPER_FLAGS_2(sqeb, TCG_CALL_NO_WG, i64, env, i64)
DEF_HELPER_FLAGS_2(sqdb, TCG_CALL_NO_WG, i64, env, i64) DEF_HELPER_FLAGS_2(sqdb, TCG_CALL_NO_WG, i64, env, i64)
......
...@@ -3986,21 +3986,21 @@ static ExitStatus op_svc(DisasContext *s, DisasOps *o) ...@@ -3986,21 +3986,21 @@ static ExitStatus op_svc(DisasContext *s, DisasOps *o)
static ExitStatus op_tceb(DisasContext *s, DisasOps *o) static ExitStatus op_tceb(DisasContext *s, DisasOps *o)
{ {
gen_helper_tceb(cc_op, o->in1, o->in2); gen_helper_tceb(cc_op, cpu_env, o->in1, o->in2);
set_cc_static(s); set_cc_static(s);
return NO_EXIT; return NO_EXIT;
} }
static ExitStatus op_tcdb(DisasContext *s, DisasOps *o) static ExitStatus op_tcdb(DisasContext *s, DisasOps *o)
{ {
gen_helper_tcdb(cc_op, o->in1, o->in2); gen_helper_tcdb(cc_op, cpu_env, o->in1, o->in2);
set_cc_static(s); set_cc_static(s);
return NO_EXIT; return NO_EXIT;
} }
static ExitStatus op_tcxb(DisasContext *s, DisasOps *o) static ExitStatus op_tcxb(DisasContext *s, DisasOps *o)
{ {
gen_helper_tcxb(cc_op, o->out, o->out2, o->in2); gen_helper_tcxb(cc_op, cpu_env, o->out, o->out2, o->in2);
set_cc_static(s); set_cc_static(s);
return NO_EXIT; return NO_EXIT;
} }
......
...@@ -71,6 +71,7 @@ static void superh_cpu_reset(CPUState *s) ...@@ -71,6 +71,7 @@ static void superh_cpu_reset(CPUState *s)
set_flush_to_zero(1, &env->fp_status); set_flush_to_zero(1, &env->fp_status);
#endif #endif
set_default_nan_mode(1, &env->fp_status); set_default_nan_mode(1, &env->fp_status);
set_snan_bit_is_one(1, &env->fp_status);
} }
static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
......
...@@ -78,6 +78,7 @@ static void unicore_ii_cpu_initfn(Object *obj) ...@@ -78,6 +78,7 @@ static void unicore_ii_cpu_initfn(Object *obj)
set_feature(env, UC32_HWCAP_CMOV); set_feature(env, UC32_HWCAP_CMOV);
set_feature(env, UC32_HWCAP_UCF64); set_feature(env, UC32_HWCAP_UCF64);
set_snan_bit_is_one(1, &env->ucf64.fp_status);
} }
static void uc32_any_cpu_initfn(Object *obj) static void uc32_any_cpu_initfn(Object *obj)
...@@ -90,6 +91,7 @@ static void uc32_any_cpu_initfn(Object *obj) ...@@ -90,6 +91,7 @@ static void uc32_any_cpu_initfn(Object *obj)
set_feature(env, UC32_HWCAP_CMOV); set_feature(env, UC32_HWCAP_CMOV);
set_feature(env, UC32_HWCAP_UCF64); set_feature(env, UC32_HWCAP_UCF64);
set_snan_bit_is_one(1, &env->ucf64.fp_status);
} }
static const UniCore32CPUInfo uc32_cpus[] = { static const UniCore32CPUInfo uc32_cpus[] = {
......
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