提交 a69abbe0 编写于 作者: M malc

Emit and use adhoc function descriptor for code_gen_prologue on PPC64

Thus avoiding fragile inline assembly hackery to call into generated
code.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4939 c046a42c-6fe2-441c-8c8c-71466251a162
上级 0b8f1b10
...@@ -773,6 +773,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc) ...@@ -773,6 +773,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
void tcg_target_qemu_prologue (TCGContext *s) void tcg_target_qemu_prologue (TCGContext *s)
{ {
int i, frame_size; int i, frame_size;
uint64_t addr;
frame_size = 0 frame_size = 0
+ 8 /* back chain */ + 8 /* back chain */
...@@ -786,6 +787,12 @@ void tcg_target_qemu_prologue (TCGContext *s) ...@@ -786,6 +787,12 @@ void tcg_target_qemu_prologue (TCGContext *s)
; ;
frame_size = (frame_size + 15) & ~15; frame_size = (frame_size + 15) & ~15;
/* First emit adhoc function descriptor */
addr = (uint64_t) s->code_ptr + 24;
tcg_out32 (s, addr >> 32); tcg_out32 (s, addr); /* entry point */
s->code_ptr += 16; /* skip TOC and environment pointer */
/* Prologue */
tcg_out32 (s, MFSPR | RT (0) | LR); tcg_out32 (s, MFSPR | RT (0) | LR);
tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff)); tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff));
for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i) for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
...@@ -796,10 +803,11 @@ void tcg_target_qemu_prologue (TCGContext *s) ...@@ -796,10 +803,11 @@ void tcg_target_qemu_prologue (TCGContext *s)
) )
); );
tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 20)); tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 20));
tcg_out32 (s, STD | RS (2) | RA (1) | (frame_size + 40));
tcg_out32 (s, MTSPR | RS (3) | CTR); tcg_out32 (s, MTSPR | RS (3) | CTR);
tcg_out32 (s, BCCTR | BO_ALWAYS); tcg_out32 (s, BCCTR | BO_ALWAYS);
/* Epilogue */
tb_ret_addr = s->code_ptr; tb_ret_addr = s->code_ptr;
for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i) for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
...@@ -810,7 +818,6 @@ void tcg_target_qemu_prologue (TCGContext *s) ...@@ -810,7 +818,6 @@ void tcg_target_qemu_prologue (TCGContext *s)
) )
); );
tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 20)); tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 20));
tcg_out32 (s, LD | RT (2) | RA (1) | (frame_size + 40));
tcg_out32 (s, MTSPR | RS (0) | LR); tcg_out32 (s, MTSPR | RS (0) | LR);
tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size); tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
tcg_out32 (s, BCLR | BO_ALWAYS); tcg_out32 (s, BCLR | BO_ALWAYS);
......
...@@ -413,24 +413,9 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2); ...@@ -413,24 +413,9 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2);
uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2); uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
extern uint8_t code_gen_prologue[]; extern uint8_t code_gen_prologue[];
#ifdef __powerpc__ #if defined(__powerpc__) && !defined(__powerpc64__)
#ifdef __powerpc64__
#define tcg_qemu_tb_exec(tb_ptr) \
({ unsigned long p; \
asm volatile ( \
"mtctr %1\n\t" \
"mr 3,%2\n\t" \
"bctrl\n\t" \
"mr %0,3\n\t" \
: "=r" (p) \
: "r" (code_gen_prologue), "r" (tb_ptr) \
: "3", "4", "5", "6", "7", "8", "9", "10", "11", "12"); \
p; \
})
#else
#define tcg_qemu_tb_exec(tb_ptr) \ #define tcg_qemu_tb_exec(tb_ptr) \
((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr) ((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
#endif
#else #else
#define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr) #define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
#endif #endif
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