提交 a412ac57 编写于 作者: B bellard

real mode support


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@335 c046a42c-6fe2-441c-8c8c-71466251a162
上级 b2b5fb22
...@@ -244,12 +244,12 @@ int cpu_exec(CPUState *env1) ...@@ -244,12 +244,12 @@ int cpu_exec(CPUState *env1)
(unsigned long)env->segs[R_ES].base | (unsigned long)env->segs[R_ES].base |
(unsigned long)env->segs[R_SS].base) != 0) << (unsigned long)env->segs[R_SS].base) != 0) <<
GEN_FLAG_ADDSEG_SHIFT; GEN_FLAG_ADDSEG_SHIFT;
if (!(env->eflags & VM_MASK)) { if (env->cr[0] & CR0_PE_MASK) {
flags |= (env->segs[R_CS].selector & 3) << GEN_FLAG_CPL_SHIFT; if (!(env->eflags & VM_MASK))
} else { flags |= (env->segs[R_CS].selector & 3) <<
/* NOTE: a dummy CPL is kept */ GEN_FLAG_CPL_SHIFT;
flags |= (1 << GEN_FLAG_VM_SHIFT); else
flags |= (3 << GEN_FLAG_CPL_SHIFT); flags |= (1 << GEN_FLAG_VM_SHIFT);
} }
flags |= (env->eflags & (IOPL_MASK | TF_MASK)); flags |= (env->eflags & (IOPL_MASK | TF_MASK));
cs_base = env->segs[R_CS].base; cs_base = env->segs[R_CS].base;
...@@ -396,12 +396,10 @@ void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector) ...@@ -396,12 +396,10 @@ void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
saved_env = env; saved_env = env;
env = s; env = s;
if (env->eflags & VM_MASK) { if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) {
SegmentCache *sc; SegmentCache *sc;
selector &= 0xffff; selector &= 0xffff;
sc = &env->segs[seg_reg]; sc = &env->segs[seg_reg];
/* NOTE: in VM86 mode, limit and flags are never reloaded,
so we must load them here */
sc->base = (void *)(selector << 4); sc->base = (void *)(selector << 4);
sc->limit = 0xffff; sc->limit = 0xffff;
sc->flags = 0; sc->flags = 0;
......
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