提交 a1b48e3a 编写于 作者: E Edgar E. Iglesias

target-microblaze: Implement MFSE EAR

Implement MFSE EAR to enable access to the upper part of EAR.
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
上级 d248e1be
......@@ -459,7 +459,7 @@ static void dec_msr(DisasContext *dc)
CPUState *cs = CPU(dc->cpu);
TCGv_i32 t0, t1;
unsigned int sr, rn;
bool to, clrset;
bool to, clrset, extended;
sr = extract32(dc->imm, 0, 14);
to = extract32(dc->imm, 14, 1);
......@@ -467,6 +467,9 @@ static void dec_msr(DisasContext *dc)
dc->type_b = 1;
if (to) {
dc->cpustate_changed = 1;
extended = extract32(dc->imm, 24, 1);
} else {
extended = extract32(dc->imm, 19, 1);
}
/* msrclr and msrset. */
......@@ -559,6 +562,10 @@ static void dec_msr(DisasContext *dc)
msr_read(dc, cpu_R[dc->rd]);
break;
case SR_EAR:
if (extended) {
tcg_gen_extrh_i64_i32(cpu_R[dc->rd], cpu_SR[sr]);
break;
}
case SR_ESR:
case SR_FSR:
case SR_BTR:
......
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