提交 a0961245 编写于 作者: A Andreas Färber

ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()

Needed for changing qemu_cpu_kick() argument type to CPUState and
for moving halted field into CPUState.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
上级 e5ab30a2
...@@ -75,9 +75,10 @@ void ppc_set_irq(CPUPPCState *env, int n_IRQ, int level) ...@@ -75,9 +75,10 @@ void ppc_set_irq(CPUPPCState *env, int n_IRQ, int level)
} }
/* PowerPC 6xx / 7xx internal IRQ controller */ /* PowerPC 6xx / 7xx internal IRQ controller */
static void ppc6xx_set_irq (void *opaque, int pin, int level) static void ppc6xx_set_irq(void *opaque, int pin, int level)
{ {
CPUPPCState *env = opaque; PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
int cur_level; int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__, LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
...@@ -151,17 +152,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) ...@@ -151,17 +152,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
} }
} }
void ppc6xx_irq_init (CPUPPCState *env) void ppc6xx_irq_init(CPUPPCState *env)
{ {
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env, PowerPCCPU *cpu = ppc_env_get_cpu(env);
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, cpu,
PPC6xx_INPUT_NB); PPC6xx_INPUT_NB);
} }
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
/* PowerPC 970 internal IRQ controller */ /* PowerPC 970 internal IRQ controller */
static void ppc970_set_irq (void *opaque, int pin, int level) static void ppc970_set_irq(void *opaque, int pin, int level)
{ {
CPUPPCState *env = opaque; PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
int cur_level; int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__, LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
...@@ -233,16 +237,19 @@ static void ppc970_set_irq (void *opaque, int pin, int level) ...@@ -233,16 +237,19 @@ static void ppc970_set_irq (void *opaque, int pin, int level)
} }
} }
void ppc970_irq_init (CPUPPCState *env) void ppc970_irq_init(CPUPPCState *env)
{ {
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, env, PowerPCCPU *cpu = ppc_env_get_cpu(env);
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, cpu,
PPC970_INPUT_NB); PPC970_INPUT_NB);
} }
/* POWER7 internal IRQ controller */ /* POWER7 internal IRQ controller */
static void power7_set_irq (void *opaque, int pin, int level) static void power7_set_irq(void *opaque, int pin, int level)
{ {
CPUPPCState *env = opaque; PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__, LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
env, pin, level); env, pin, level);
...@@ -266,17 +273,20 @@ static void power7_set_irq (void *opaque, int pin, int level) ...@@ -266,17 +273,20 @@ static void power7_set_irq (void *opaque, int pin, int level)
} }
} }
void ppcPOWER7_irq_init (CPUPPCState *env) void ppcPOWER7_irq_init(CPUPPCState *env)
{ {
env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, env, PowerPCCPU *cpu = ppc_env_get_cpu(env);
env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, cpu,
POWER7_INPUT_NB); POWER7_INPUT_NB);
} }
#endif /* defined(TARGET_PPC64) */ #endif /* defined(TARGET_PPC64) */
/* PowerPC 40x internal IRQ controller */ /* PowerPC 40x internal IRQ controller */
static void ppc40x_set_irq (void *opaque, int pin, int level) static void ppc40x_set_irq(void *opaque, int pin, int level)
{ {
CPUPPCState *env = opaque; PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
int cur_level; int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__, LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
...@@ -346,16 +356,19 @@ static void ppc40x_set_irq (void *opaque, int pin, int level) ...@@ -346,16 +356,19 @@ static void ppc40x_set_irq (void *opaque, int pin, int level)
} }
} }
void ppc40x_irq_init (CPUPPCState *env) void ppc40x_irq_init(CPUPPCState *env)
{ {
PowerPCCPU *cpu = ppc_env_get_cpu(env);
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc40x_set_irq, env->irq_inputs = (void **)qemu_allocate_irqs(&ppc40x_set_irq,
env, PPC40x_INPUT_NB); cpu, PPC40x_INPUT_NB);
} }
/* PowerPC E500 internal IRQ controller */ /* PowerPC E500 internal IRQ controller */
static void ppce500_set_irq (void *opaque, int pin, int level) static void ppce500_set_irq(void *opaque, int pin, int level)
{ {
CPUPPCState *env = opaque; PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
int cur_level; int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__, LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
...@@ -407,10 +420,12 @@ static void ppce500_set_irq (void *opaque, int pin, int level) ...@@ -407,10 +420,12 @@ static void ppce500_set_irq (void *opaque, int pin, int level)
} }
} }
void ppce500_irq_init (CPUPPCState *env) void ppce500_irq_init(CPUPPCState *env)
{ {
PowerPCCPU *cpu = ppc_env_get_cpu(env);
env->irq_inputs = (void **)qemu_allocate_irqs(&ppce500_set_irq, env->irq_inputs = (void **)qemu_allocate_irqs(&ppce500_set_irq,
env, PPCE500_INPUT_NB); cpu, PPCE500_INPUT_NB);
} }
/*****************************************************************************/ /*****************************************************************************/
/* PowerPC time base and decrementer emulation */ /* PowerPC time base and decrementer emulation */
......
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