提交 957956b3 编写于 作者: T Thomas Hanson 提交者: Peter Maydell

target-arm: Comments added to identify cases in a switch

3 cases in a switch in disas_exc() require reference to the
ARM ARM spec in order to determine what case they're handling.
Signed-off-by: NThomas Hanson <thomas.hanson@linaro.org>
Message-id: 1476301853-15774-5-git-send-email-thomas.hanson@linaro.org
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
上级 6feecb8b
...@@ -1667,12 +1667,12 @@ static void disas_exc(DisasContext *s, uint32_t insn) ...@@ -1667,12 +1667,12 @@ static void disas_exc(DisasContext *s, uint32_t insn)
* instruction works properly. * instruction works properly.
*/ */
switch (op2_ll) { switch (op2_ll) {
case 1: case 1: /* SVC */
gen_ss_advance(s); gen_ss_advance(s);
gen_exception_insn(s, 0, EXCP_SWI, syn_aa64_svc(imm16), gen_exception_insn(s, 0, EXCP_SWI, syn_aa64_svc(imm16),
default_exception_el(s)); default_exception_el(s));
break; break;
case 2: case 2: /* HVC */
if (s->current_el == 0) { if (s->current_el == 0) {
unallocated_encoding(s); unallocated_encoding(s);
break; break;
...@@ -1685,7 +1685,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) ...@@ -1685,7 +1685,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
gen_ss_advance(s); gen_ss_advance(s);
gen_exception_insn(s, 0, EXCP_HVC, syn_aa64_hvc(imm16), 2); gen_exception_insn(s, 0, EXCP_HVC, syn_aa64_hvc(imm16), 2);
break; break;
case 3: case 3: /* SMC */
if (s->current_el == 0) { if (s->current_el == 0) {
unallocated_encoding(s); unallocated_encoding(s);
break; break;
......
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