mainstone: use gpio 0 for connection of FPGA instead of hooking into PIC directly
Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>
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Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>