提交 8e27dd6f 编写于 作者: A aurel32

Add GEN_VXFORM macro for subsequent instructions.

Signed-off-by: NNathan Froyd <froydnj@codesourcery.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6154 c046a42c-6fe2-441c-8c8c-71466251a162
上级 d6a46fe8
...@@ -6164,6 +6164,23 @@ GEN_VX_LOGICAL(vor, tcg_gen_or_i64, 2, 18); ...@@ -6164,6 +6164,23 @@ GEN_VX_LOGICAL(vor, tcg_gen_or_i64, 2, 18);
GEN_VX_LOGICAL(vxor, tcg_gen_xor_i64, 2, 19); GEN_VX_LOGICAL(vxor, tcg_gen_xor_i64, 2, 19);
GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20); GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20);
#define GEN_VXFORM(name, opc2, opc3) \
GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \
{ \
TCGv_ptr ra, rb, rd; \
if (unlikely(!ctx->altivec_enabled)) { \
gen_exception(ctx, POWERPC_EXCP_VPU); \
return; \
} \
ra = gen_avr_ptr(rA(ctx->opcode)); \
rb = gen_avr_ptr(rB(ctx->opcode)); \
rd = gen_avr_ptr(rD(ctx->opcode)); \
gen_helper_##name (rd, ra, rb); \
tcg_temp_free_ptr(ra); \
tcg_temp_free_ptr(rb); \
tcg_temp_free_ptr(rd); \
}
/*** SPE extension ***/ /*** SPE extension ***/
/* Register moves */ /* Register moves */
......
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