提交 8bf5a804 编写于 作者: T ths

Fix opcode for sts.l fpul/cpscr, by Magnus Damm.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2729 c046a42c-6fe2-441c-8c8c-71466251a162
上级 945446c6
...@@ -1003,8 +1003,8 @@ void decode_opc(DisasContext * ctx) ...@@ -1003,8 +1003,8 @@ void decode_opc(DisasContext * ctx)
LDST(mach, 0x400a, 0x4006, lds, 0x000a, 0x4002, sts,) LDST(mach, 0x400a, 0x4006, lds, 0x000a, 0x4002, sts,)
LDST(macl, 0x401a, 0x4016, lds, 0x001a, 0x4012, sts,) LDST(macl, 0x401a, 0x4016, lds, 0x001a, 0x4012, sts,)
LDST(pr, 0x402a, 0x4026, lds, 0x002a, 0x4022, sts,) LDST(pr, 0x402a, 0x4026, lds, 0x002a, 0x4022, sts,)
LDST(fpul, 0x405a, 0x4056, lds, 0x005a, 0x0052, sts,) LDST(fpul, 0x405a, 0x4056, lds, 0x005a, 0x4052, sts,)
LDST(fpscr, 0x406a, 0x4066, lds, 0x006a, 0x0062, sts, ctx->flags |= LDST(fpscr, 0x406a, 0x4066, lds, 0x006a, 0x4062, sts, ctx->flags |=
MODE_CHANGE;) MODE_CHANGE;)
case 0x00c3: /* movca.l R0,@Rm */ case 0x00c3: /* movca.l R0,@Rm */
gen_op_movl_rN_T0(REG(0)); gen_op_movl_rN_T0(REG(0));
......
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