提交 7957ee71 编写于 作者: H Hannes Reinecke 提交者: Paolo Bonzini

megasas: Fixup MSI-X handling

MSI-X works slightly different than INTx; the doorbell
registers are not necessarily used as MSI-X interrupts
are directed anyway. So the head pointer on the
reply queue needs to be updated as soon as a frame
is completed, and we can set the doorbell only
when in INTx mode.
Signed-off-by: NHannes Reinecke <hare@suse.de>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
上级 6df5718b
......@@ -545,34 +545,41 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
* Context is opaque, but emulation is running in
* little endian. So convert it.
*/
tail = s->reply_queue_head;
if (megasas_use_queue64(s)) {
queue_offset = tail * sizeof(uint64_t);
queue_offset = s->reply_queue_head * sizeof(uint64_t);
stq_le_phys(&address_space_memory,
s->reply_queue_pa + queue_offset, context);
} else {
queue_offset = tail * sizeof(uint32_t);
queue_offset = s->reply_queue_head * sizeof(uint32_t);
stl_le_phys(&address_space_memory,
s->reply_queue_pa + queue_offset, context);
}
s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
s->reply_queue_tail = ldl_le_phys(&address_space_memory,
s->consumer_pa);
trace_megasas_qf_complete(context, s->reply_queue_head,
s->reply_queue_tail, s->busy, s->doorbell);
s->reply_queue_tail, s->busy);
}
if (megasas_intr_enabled(s)) {
/* Update reply queue pointer */
s->reply_queue_tail = ldl_le_phys(&address_space_memory,
s->consumer_pa);
tail = s->reply_queue_head;
s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail,
s->busy);
stl_le_phys(&address_space_memory,
s->producer_pa, s->reply_queue_head);
/* Notify HBA */
s->doorbell++;
if (s->doorbell == 1) {
if (msix_enabled(pci_dev)) {
trace_megasas_msix_raise(0);
msix_notify(pci_dev, 0);
} else if (msi_enabled(pci_dev)) {
trace_megasas_msi_raise(0);
msi_notify(pci_dev, 0);
} else {
if (msix_enabled(pci_dev)) {
trace_megasas_msix_raise(0);
msix_notify(pci_dev, 0);
} else if (msi_enabled(pci_dev)) {
trace_megasas_msi_raise(0);
msi_notify(pci_dev, 0);
} else {
s->doorbell++;
if (s->doorbell == 1) {
trace_megasas_irq_raise();
pci_irq_assert(pci_dev);
}
......@@ -2028,7 +2035,7 @@ static uint64_t megasas_mmio_read(void *opaque, hwaddr addr,
trace_megasas_mmio_readl("MFI_OMSK", retval);
break;
case MFI_ODCR0:
retval = s->doorbell;
retval = s->doorbell ? 1 : 0;
trace_megasas_mmio_readl("MFI_ODCR0", retval);
break;
case MFI_DIAG:
......@@ -2103,15 +2110,8 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
case MFI_ODCR0:
trace_megasas_mmio_writel("MFI_ODCR0", val);
s->doorbell = 0;
if (s->producer_pa && megasas_intr_enabled(s)) {
/* Update reply queue pointer */
s->reply_queue_tail = ldl_le_phys(&address_space_memory,
s->consumer_pa);
trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail,
s->busy);
stl_le_phys(&address_space_memory,
s->producer_pa, s->reply_queue_head);
if (!msix_enabled(pci_dev)) {
if (megasas_intr_enabled(s)) {
if (!msix_enabled(pci_dev) && !msi_enabled(pci_dev)) {
trace_megasas_irq_lower();
pci_irq_deassert(pci_dev);
}
......
......@@ -706,7 +706,7 @@ megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, uns
megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) "head %x tail %x busy %d"
megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " "
megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy, unsigned int doorbell) "context %" PRIx64 " head %x tail %x busy %d doorbell %x"
megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) "context %" PRIx64 " head %x tail %x busy %d"
megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy"
megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd %x"
megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
......
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