提交 7826c2b2 编写于 作者: G Greg Kurz 提交者: Michael S. Tsirkin

target-ppc: enable virtio endian ambivalent support

The device endianness is the cpu endianness at device reset time.
Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
Reviewed-by: NAlexander Graf <agraf@suse.de>
Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
上级 d64ccb91
......@@ -29,6 +29,8 @@
#define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 12
#define TARGET_IS_BIENDIAN 1
/* Note that the official physical address space bits is 62-M where M
is implementation dependent. I've not looked up M for the set of
cpus we emulate at the system level. */
......
......@@ -9597,6 +9597,18 @@ static void ppc_cpu_reset(CPUState *s)
tlb_flush(s, 1);
}
#ifndef CONFIG_USER_ONLY
static bool ppc_cpu_is_big_endian(CPUState *cs)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
cpu_synchronize_state(cs);
return !msr_le;
}
#endif
static void ppc_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
......@@ -9692,6 +9704,9 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
#else
cc->gdb_core_xml_file = "power-core.xml";
#endif
#ifndef CONFIG_USER_ONLY
cc->virtio_is_big_endian = ppc_cpu_is_big_endian;
#endif
dc->fw_name = "PowerPC,UNKNOWN";
}
......
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