use CPUState

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@540 c046a42c-6fe2-441c-8c8c-71466251a162

hw/ide.c

@@ -1047,7 +1047,7 @@ static void ide_atapi_cmd(IDEState *s)
     }
 }
 
-static void ide_ioport_write(CPUX86State *env, uint32_t addr, uint32_t val)
+static void ide_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
 {
     IDEState *ide_if = get_ide_interface(addr);
     IDEState *s = ide_if->cur_drive;
@@ -1198,7 +1198,7 @@ static void ide_ioport_write(CPUX86State *env, uint32_t addr, uint32_t val)
     }
 }
 
-static uint32_t ide_ioport_read(CPUX86State *env, uint32_t addr1)
+static uint32_t ide_ioport_read(CPUState *env, uint32_t addr1)
 {
     IDEState *s = get_ide_interface(addr1)->cur_drive;
     uint32_t addr;
@@ -1239,7 +1239,7 @@ static uint32_t ide_ioport_read(CPUX86State *env, uint32_t addr1)
     return ret;
 }
 
-static uint32_t ide_status_read(CPUX86State *env, uint32_t addr)
+static uint32_t ide_status_read(CPUState *env, uint32_t addr)
 {
     IDEState *s = get_ide_interface(addr)->cur_drive;
     int ret;
@@ -1250,7 +1250,7 @@ static uint32_t ide_status_read(CPUX86State *env, uint32_t addr)
     return ret;
 }
 
-static void ide_cmd_write(CPUX86State *env, uint32_t addr, uint32_t val)
+static void ide_cmd_write(CPUState *env, uint32_t addr, uint32_t val)
 {
     IDEState *ide_if = get_ide_interface(addr);
     IDEState *s;
@@ -1285,7 +1285,7 @@ static void ide_cmd_write(CPUX86State *env, uint32_t addr, uint32_t val)
     ide_if[1].cmd = val;
 }
 
-static void ide_data_writew(CPUX86State *env, uint32_t addr, uint32_t val)
+static void ide_data_writew(CPUState *env, uint32_t addr, uint32_t val)
 {
     IDEState *s = get_ide_interface(addr)->cur_drive;
     uint8_t *p;
@@ -1298,7 +1298,7 @@ static void ide_data_writew(CPUX86State *env, uint32_t addr, uint32_t val)
         s->end_transfer_func(s);
 }
 
-static uint32_t ide_data_readw(CPUX86State *env, uint32_t addr)
+static uint32_t ide_data_readw(CPUState *env, uint32_t addr)
 {
     IDEState *s = get_ide_interface(addr)->cur_drive;
     uint8_t *p;
@@ -1312,7 +1312,7 @@ static uint32_t ide_data_readw(CPUX86State *env, uint32_t addr)
     return ret;
 }
 
-static void ide_data_writel(CPUX86State *env, uint32_t addr, uint32_t val)
+static void ide_data_writel(CPUState *env, uint32_t addr, uint32_t val)
 {
     IDEState *s = get_ide_interface(addr)->cur_drive;
     uint8_t *p;
@@ -1325,7 +1325,7 @@ static void ide_data_writel(CPUX86State *env, uint32_t addr, uint32_t val)
         s->end_transfer_func(s);
 }
 
-static uint32_t ide_data_readl(CPUX86State *env, uint32_t addr)
+static uint32_t ide_data_readl(CPUState *env, uint32_t addr)
 {
     IDEState *s = get_ide_interface(addr)->cur_drive;
     uint8_t *p;

hw/sb16.c

@@ -48,9 +48,9 @@
 #endif
 
 #define IO_READ_PROTO(name) \
-    uint32_t name (struct CPUX86State *env, uint32_t nport)
+    uint32_t name (struct CPUState *env, uint32_t nport)
 #define IO_WRITE_PROTO(name) \
-    void name (struct CPUX86State *env, uint32_t nport, uint32_t val)
+    void name (struct CPUState *env, uint32_t nport, uint32_t val)
 
 static struct {
     int ver_lo;

hw/vga.c

@@ -223,7 +223,7 @@ static uint8_t expand4to8[16];
 VGAState vga_state;
 int vga_io_memory;
 
-static uint32_t vga_ioport_read(CPUX86State *env, uint32_t addr)
+static uint32_t vga_ioport_read(CPUState *env, uint32_t addr)
 {
     VGAState *s = &vga_state;
     int val, index;
@@ -319,7 +319,7 @@ static uint32_t vga_ioport_read(CPUX86State *env, uint32_t addr)
     return val;
 }
 
-static void vga_ioport_write(CPUX86State *env, uint32_t addr, uint32_t val)
+static void vga_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
 {
     VGAState *s = &vga_state;
     int index, v;
@@ -1350,8 +1350,8 @@ CPUWriteMemoryFunc *vga_mem_write[3] = {
     vga_mem_writel,
 };
 
-int vga_init(DisplayState *ds, uint8_t *vga_ram_base, 
-             unsigned long vga_ram_offset, int vga_ram_size)
+int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base, 
+                   unsigned long vga_ram_offset, int vga_ram_size)
 {
     VGAState *s = &vga_state;
     int i, j, v, b;
@@ -1417,6 +1417,10 @@ int vga_init(DisplayState *ds, uint8_t *vga_ram_base,
     register_ioport_read(0x3da, 1, vga_ioport_read, 1);
 
     vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write);
-    cpu_register_physical_memory(0xa0000, 0x20000, vga_io_memory);
+#if defined (TARGET_I386)
+    cpu_register_physical_memory(0x000a0000, 0x20000, vga_io_memory);
+#elif defined (TARGET_PPC)
+    cpu_register_physical_memory(0xf00a0000, 0x20000, vga_io_memory);
+#endif
     return 0;
 }

vl.h

@@ -25,12 +25,12 @@
 #define VL_H
 
 /* vl.c */
-struct CPUX86State;
+struct CPUState;
 extern int reset_requested;
 extern int64_t ticks_per_sec;
 
-typedef void (IOPortWriteFunc)(struct CPUX86State *env, uint32_t address, uint32_t data);
-typedef uint32_t (IOPortReadFunc)(struct CPUX86State *env, uint32_t address);
+typedef void (IOPortWriteFunc)(struct CPUState *env, uint32_t address, uint32_t data);
+typedef uint32_t (IOPortReadFunc)(struct CPUState *env, uint32_t address);
 
 void *get_mmap_addr(unsigned long size);
 int register_ioport_read(int start, int length, IOPortReadFunc *func, int size);
@@ -93,8 +93,8 @@ static inline void dpy_resize(DisplayState *s, int w, int h)
     s->dpy_resize(s, w, h);
 }
 
-int vga_init(DisplayState *ds, uint8_t *vga_ram_base, 
-             unsigned long vga_ram_offset, int vga_ram_size);
+int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base, 
+                   unsigned long vga_ram_offset, int vga_ram_size);
 void vga_update_display(void);
 
 /* sdl.c */
@@ -144,4 +144,13 @@ void DMA_register_channel (int nchan,
 void SB16_run (void);
 void SB16_init (void);
  
+/* fdc.c */
+#define MAX_FD 2
+extern BlockDriverState *fd_table[MAX_FD];
+
+void cmos_register_fd (uint8_t fd0, uint8_t fd1);
+void fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, uint32_t base,
+                  char boot_device);
+int fdctrl_disk_change (int idx, const unsigned char *filename, int ro);
+
 #endif /* VL_H */