提交 6e87b7c7 编写于 作者: A aurel32

Make mtvscr use a helper

Do this so we can set float statuses once per mtvscr, rather than once
per Altivec instruction.
Signed-off-by: NNathan Froyd <froydnj@codesourcery.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6508 c046a42c-6fe2-441c-8c8c-71466251a162
上级 cf8358c8
...@@ -220,6 +220,7 @@ DEF_HELPER_4(vmsumuhs, void, avr, avr, avr, avr) ...@@ -220,6 +220,7 @@ DEF_HELPER_4(vmsumuhs, void, avr, avr, avr, avr)
DEF_HELPER_4(vmsumshm, void, avr, avr, avr, avr) DEF_HELPER_4(vmsumshm, void, avr, avr, avr, avr)
DEF_HELPER_4(vmsumshs, void, avr, avr, avr, avr) DEF_HELPER_4(vmsumshs, void, avr, avr, avr, avr)
DEF_HELPER_4(vmladduhm, void, avr, avr, avr, avr) DEF_HELPER_4(vmladduhm, void, avr, avr, avr, avr)
DEF_HELPER_1(mtvscr, void, avr);
DEF_HELPER_2(lvebx, void, avr, tl) DEF_HELPER_2(lvebx, void, avr, tl)
DEF_HELPER_2(lvehx, void, avr, tl) DEF_HELPER_2(lvehx, void, avr, tl)
DEF_HELPER_2(lvewx, void, avr, tl) DEF_HELPER_2(lvewx, void, avr, tl)
......
...@@ -2050,6 +2050,16 @@ STVE(stvewx, stl, bswap32, u32) ...@@ -2050,6 +2050,16 @@ STVE(stvewx, stl, bswap32, u32)
#undef I #undef I
#undef LVE #undef LVE
void helper_mtvscr (ppc_avr_t *r)
{
#if defined(WORDS_BIGENDIAN)
env->vscr = r->u32[3];
#else
env->vscr = r->u32[0];
#endif
set_flush_to_zero(vscr_nj, &env->vec_status);
}
void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
{ {
int i; int i;
......
...@@ -6268,15 +6268,14 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC) ...@@ -6268,15 +6268,14 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC)
GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC)
{ {
TCGv_i32 t; TCGv_ptr p;
if (unlikely(!ctx->altivec_enabled)) { if (unlikely(!ctx->altivec_enabled)) {
gen_exception(ctx, POWERPC_EXCP_VPU); gen_exception(ctx, POWERPC_EXCP_VPU);
return; return;
} }
t = tcg_temp_new_i32(); p = gen_avr_ptr(rD(ctx->opcode));
tcg_gen_trunc_i64_i32(t, cpu_avrl[rD(ctx->opcode)]); gen_helper_mtvscr(p);
tcg_gen_st_i32(t, cpu_env, offsetof(CPUState, vscr)); tcg_temp_free_ptr(p);
tcg_temp_free_i32(t);
} }
/* Logical operations */ /* Logical operations */
......
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