提交 60bf84cf 编写于 作者: S Stefan Weil 提交者: Aurelien Jarno

tcp/mips: Change TCG_AREG0 (fp -> s0)

Register fp (frame pointer) is a bad choice for compilations
without optimisation, because the compiler makes heavy use
of this register (so the resulting code crashes).

Register s0 had been used for TCG_AREG1 in earlier releases,
but was no longer used and is now free for TCG_AREG0.

The resulting code works for compilations without
optimisation (tested with qemu mips in qemu mips
on x86 host).
Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
上级 f038e8f7
......@@ -59,7 +59,7 @@ extern int printf(const char *, ...);
#elif defined(__hppa__)
#define AREG0 "r17"
#elif defined(__mips__)
#define AREG0 "fp"
#define AREG0 "s0"
#elif defined(__sparc__)
#ifdef CONFIG_SOLARIS
#define AREG0 "g2"
......
......@@ -1450,7 +1450,9 @@ static const TCGTargetOpDef mips_op_defs[] = {
};
static int tcg_target_callee_save_regs[] = {
#if 0 /* used for the global env (TCG_AREG0), so no need to save */
TCG_REG_S0,
#endif
TCG_REG_S1,
TCG_REG_S2,
TCG_REG_S3,
......@@ -1459,8 +1461,7 @@ static int tcg_target_callee_save_regs[] = {
TCG_REG_S6,
TCG_REG_S7,
TCG_REG_GP,
/* TCG_REG_FP, */ /* currently used for the global env, so np
need to save */
TCG_REG_FP,
TCG_REG_RA, /* should be last for ABI compliance */
};
......
......@@ -97,7 +97,7 @@ enum {
#undef TCG_TARGET_HAS_ext16u_i32 /* andi rt, rs, 0xffff */
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_FP
#define TCG_AREG0 TCG_REG_S0
/* guest base is supported */
#define TCG_TARGET_HAS_GUEST_BASE
......
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