提交 5250ced8 编写于 作者: A Alistair Francis 提交者: Edgar E. Iglesias

target-microblaze: Set the PC in reset instead of realize

Set the Microblaze CPU PC in the reset instead of setting it
in the realize. This is required as the PC is zeroed in the
reset function and causes problems in some situations.
Signed-off-by: NAlistair Francis <alistair.francis@xilinx.com>
Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
上级 c8667283
...@@ -107,6 +107,8 @@ static void mb_cpu_reset(CPUState *s) ...@@ -107,6 +107,8 @@ static void mb_cpu_reset(CPUState *s)
/* Disable stack protector. */ /* Disable stack protector. */
env->shr = ~0; env->shr = ~0;
env->sregs[SR_PC] = cpu->cfg.base_vectors;
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
/* start in user mode with interrupts enabled. */ /* start in user mode with interrupts enabled. */
env->sregs[SR_MSR] = MSR_EE | MSR_IE | MSR_VM | MSR_UM; env->sregs[SR_MSR] = MSR_EE | MSR_IE | MSR_VM | MSR_UM;
...@@ -183,8 +185,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) ...@@ -183,8 +185,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
env->sregs[SR_PC] = cpu->cfg.base_vectors;
mcc->parent_realize(dev, errp); mcc->parent_realize(dev, errp);
} }
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册