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qemu
提交 463230d8 编写于 作者: R Richard Henderson
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tcg-ia64: Introduce tcg_opc_bswap64_i 

Acked-by: NAurelien Jarno <aurelien@aurel32.net>
Signed-off-by: NRichard Henderson <rth@twiddle.net>
上级 db008a8d
隐藏空白更改
内联 并排
Showing with 28 addition and 35 deletion
tcg/ia64/tcg-target.c
浏览文件 @ 463230d8
...@@ -1400,12 +1400,17 @@ static inline void tcg_out_ext(TCGContext *s, uint64_t opc_i29, ...@@ -1400,12 +1400,17 @@ static inline void tcg_out_ext(TCGContext *s, uint64_t opc_i29,
tcg_opc_i29(TCG_REG_P0, opc_i29, ret, arg)); tcg_opc_i29(TCG_REG_P0, opc_i29, ret, arg));
} }
static inline uint64_t tcg_opc_bswap64_i(int qp, TCGReg d, TCGReg s)
{
return tcg_opc_i3(qp, OPC_MUX1_I3, d, s, 0xb);
}
static inline void tcg_out_bswap16(TCGContext *s, TCGArg ret, TCGArg arg) static inline void tcg_out_bswap16(TCGContext *s, TCGArg ret, TCGArg arg)
{ {
tcg_out_bundle(s, mII, tcg_out_bundle(s, mII,
INSN_NOP_M, INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 15, 15), tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 15, 15),
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, ret, ret, 0xb)); tcg_opc_bswap64_i(TCG_REG_P0, ret, ret));
} }
static inline void tcg_out_bswap32(TCGContext *s, TCGArg ret, TCGArg arg) static inline void tcg_out_bswap32(TCGContext *s, TCGArg ret, TCGArg arg)
...@@ -1413,7 +1418,7 @@ static inline void tcg_out_bswap32(TCGContext *s, TCGArg ret, TCGArg arg) ...@@ -1413,7 +1418,7 @@ static inline void tcg_out_bswap32(TCGContext *s, TCGArg ret, TCGArg arg)
tcg_out_bundle(s, mII, tcg_out_bundle(s, mII,
INSN_NOP_M, INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 31, 31), tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 31, 31),
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, ret, ret, 0xb)); tcg_opc_bswap64_i(TCG_REG_P0, ret, ret));
} }
static inline void tcg_out_bswap64(TCGContext *s, TCGArg ret, TCGArg arg) static inline void tcg_out_bswap64(TCGContext *s, TCGArg ret, TCGArg arg)
...@@ -1421,7 +1426,7 @@ static inline void tcg_out_bswap64(TCGContext *s, TCGArg ret, TCGArg arg) ...@@ -1421,7 +1426,7 @@ static inline void tcg_out_bswap64(TCGContext *s, TCGArg ret, TCGArg arg)
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
INSN_NOP_M, INSN_NOP_M,
INSN_NOP_I, INSN_NOP_I,
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, ret, arg, 0xb)); tcg_opc_bswap64_i(TCG_REG_P0, ret, arg));
} }
static inline void tcg_out_deposit(TCGContext *s, TCGArg ret, TCGArg a1, static inline void tcg_out_deposit(TCGContext *s, TCGArg ret, TCGArg a1,
...@@ -1659,8 +1664,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, ...@@ -1659,8 +1664,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
} else { } else {
tcg_out_bundle(s, miB, tcg_out_bundle(s, miB,
tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R58, mem_index), tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R58, mem_index),
tcg_opc_i3 (TCG_REG_P6, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R8, TCG_REG_R8),
TCG_REG_R8, TCG_REG_R8, 0xb),
tcg_opc_b5 (TCG_REG_P7, OPC_BR_CALL_SPTK_MANY_B5, tcg_opc_b5 (TCG_REG_P7, OPC_BR_CALL_SPTK_MANY_B5,
TCG_REG_B0, TCG_REG_B6)); TCG_REG_B0, TCG_REG_B6));
} }
...@@ -1734,8 +1738,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, ...@@ -1734,8 +1738,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg), tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg),
INSN_NOP_I, INSN_NOP_I,
tcg_opc_i3 (TCG_REG_P6, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R2, TCG_REG_R2));
TCG_REG_R2, TCG_REG_R2, 0xb));
data_reg = TCG_REG_R2; data_reg = TCG_REG_R2;
break; break;
...@@ -1749,8 +1752,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, ...@@ -1749,8 +1752,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg), tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg),
INSN_NOP_I, INSN_NOP_I,
tcg_opc_i3 (TCG_REG_P6, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R2, TCG_REG_R2));
TCG_REG_R2, TCG_REG_R2, 0xb));
data_reg = TCG_REG_R2; data_reg = TCG_REG_R2;
break; break;
...@@ -1759,8 +1761,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, ...@@ -1759,8 +1761,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_opc_m1 (TCG_REG_P7, OPC_LD8_M1, tcg_opc_m1 (TCG_REG_P7, OPC_LD8_M1,
TCG_REG_R1, TCG_REG_R2), TCG_REG_R1, TCG_REG_R2),
tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg), tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg),
tcg_opc_i3 (TCG_REG_P6, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R2, data_reg));
TCG_REG_R2, data_reg, 0xb));
data_reg = TCG_REG_R2; data_reg = TCG_REG_R2;
break; break;
...@@ -1827,8 +1828,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, ...@@ -1827,8 +1828,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits], tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
data_reg, TCG_REG_R2), data_reg, TCG_REG_R2),
INSN_NOP_I, INSN_NOP_I,
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
data_reg, data_reg, 0xb));
} else { } else {
if (s_bits == MO_16) { if (s_bits == MO_16) {
tcg_out_bundle(s, mII, tcg_out_bundle(s, mII,
...@@ -1849,13 +1849,11 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, ...@@ -1849,13 +1849,11 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
INSN_NOP_M, INSN_NOP_M,
INSN_NOP_I, INSN_NOP_I,
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
data_reg, data_reg, 0xb));
} else { } else {
tcg_out_bundle(s, mII, tcg_out_bundle(s, mII,
INSN_NOP_M, INSN_NOP_M,
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg),
data_reg, data_reg, 0xb),
tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg)); tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg));
} }
} }
...@@ -1880,21 +1878,18 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, ...@@ -1880,21 +1878,18 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
INSN_NOP_M, INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
data_reg, data_reg, 15, 15), data_reg, data_reg, 15, 15),
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
data_reg, data_reg, 0xb));
} else if (bswap && s_bits == MO_32) { } else if (bswap && s_bits == MO_32) {
tcg_out_bundle(s, mII, tcg_out_bundle(s, mII,
INSN_NOP_M, INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
data_reg, data_reg, 31, 31), data_reg, data_reg, 31, 31),
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
data_reg, data_reg, 0xb));
} else if (bswap && s_bits == MO_64) { } else if (bswap && s_bits == MO_64) {
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
INSN_NOP_M, INSN_NOP_M,
INSN_NOP_I, INSN_NOP_I,
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
data_reg, data_reg, 0xb));
} }
if (opc & MO_SIGN) { if (opc & MO_SIGN) {
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
...@@ -1944,23 +1939,22 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, ...@@ -1944,23 +1939,22 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
INSN_NOP_M, INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
TCG_REG_R3, data_reg, 15, 15), TCG_REG_R3, data_reg, 15, 15),
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0,
TCG_REG_R3, TCG_REG_R3, 0xb)); TCG_REG_R3, TCG_REG_R3));
data_reg = TCG_REG_R3; data_reg = TCG_REG_R3;
} else if (s_bits == MO_32) { } else if (s_bits == MO_32) {
tcg_out_bundle(s, mII, tcg_out_bundle(s, mII,
INSN_NOP_M, INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
TCG_REG_R3, data_reg, 31, 31), TCG_REG_R3, data_reg, 31, 31),
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0,
TCG_REG_R3, TCG_REG_R3, 0xb)); TCG_REG_R3, TCG_REG_R3));
data_reg = TCG_REG_R3; data_reg = TCG_REG_R3;
} else if (s_bits == MO_64) { } else if (s_bits == MO_64) {
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
INSN_NOP_M, INSN_NOP_M,
INSN_NOP_I, INSN_NOP_I,
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R3, data_reg));
TCG_REG_R3, data_reg, 0xb));
data_reg = TCG_REG_R3; data_reg = TCG_REG_R3;
} }
} }
...@@ -1990,23 +1984,22 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, ...@@ -1990,23 +1984,22 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
add_guest_base, add_guest_base,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
TCG_REG_R3, data_reg, 15, 15), TCG_REG_R3, data_reg, 15, 15),
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0,
TCG_REG_R3, TCG_REG_R3, 0xb)); TCG_REG_R3, TCG_REG_R3));
data_reg = TCG_REG_R3; data_reg = TCG_REG_R3;
} else if (s_bits == MO_32) { } else if (s_bits == MO_32) {
tcg_out_bundle(s, mII, tcg_out_bundle(s, mII,
add_guest_base, add_guest_base,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
TCG_REG_R3, data_reg, 31, 31), TCG_REG_R3, data_reg, 31, 31),
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0,
TCG_REG_R3, TCG_REG_R3, 0xb)); TCG_REG_R3, TCG_REG_R3));
data_reg = TCG_REG_R3; data_reg = TCG_REG_R3;
} else if (s_bits == MO_64) { } else if (s_bits == MO_64) {
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
add_guest_base, add_guest_base,
INSN_NOP_I, INSN_NOP_I,
tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R3, data_reg));
TCG_REG_R3, data_reg, 0xb));
data_reg = TCG_REG_R3; data_reg = TCG_REG_R3;
} }
tcg_out_bundle(s, miI, tcg_out_bundle(s, miI,
......
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