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提交 449c0d70 编写于 作者: B Blue Swirl 提交者： Alexander Graf
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target-s390x: avoid AREG0 for FPU helpers 

Make FPU helpers take a parameter for CPUState instead
of relying on global env.

Introduce temporary wrappers for FPU load and store ops.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
Signed-off-by: NAlexander Graf <agraf@suse.de>
上级 aea1e885
展开全部 隐藏空白更改
内联 并排
Showing with 257 addition and 191 deletion
target-s390x/Makefile.objs
浏览文件 @ 449c0d70
...@@ -4,7 +4,6 @@ obj-$(CONFIG_SOFTMMU) += machine.o ...@@ -4,7 +4,6 @@ obj-$(CONFIG_SOFTMMU) += machine.o
obj-$(CONFIG_KVM) += kvm.o obj-$(CONFIG_KVM) += kvm.o
$(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/fpu_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
target-s390x/cc_helper.c
浏览文件 @ 449c0d70
...@@ -473,10 +473,10 @@ static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op, ...@@ -473,10 +473,10 @@ static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
break; break;
case CC_OP_LTGT_F32: case CC_OP_LTGT_F32:
r = set_cc_f32(src, dst); r = set_cc_f32(env, src, dst);
break; break;
case CC_OP_LTGT_F64: case CC_OP_LTGT_F64:
r = set_cc_f64(src, dst); r = set_cc_f64(env, src, dst);
break; break;
case CC_OP_NZ_F32: case CC_OP_NZ_F32:
r = set_cc_nz_f32(dst); r = set_cc_nz_f32(dst);
......
target-s390x/cpu.h
浏览文件 @ 449c0d70
...@@ -1000,12 +1000,22 @@ static inline void cpu_pc_from_tb(CPUS390XState *env, TranslationBlock* tb) ...@@ -1000,12 +1000,22 @@ static inline void cpu_pc_from_tb(CPUS390XState *env, TranslationBlock* tb)
} }
/* fpu_helper.c */ /* fpu_helper.c */
uint32_t set_cc_f32(float32 v1, float32 v2); uint32_t set_cc_f32(CPUS390XState *env, float32 v1, float32 v2);
uint32_t set_cc_f64(float64 v1, float64 v2); uint32_t set_cc_f64(CPUS390XState *env, float64 v1, float64 v2);
uint32_t set_cc_nz_f32(float32 v); uint32_t set_cc_nz_f32(float32 v);
uint32_t set_cc_nz_f64(float64 v); uint32_t set_cc_nz_f64(float64 v);
/* misc_helper.c */ /* misc_helper.c */
void program_interrupt(CPUS390XState *env, uint32_t code, int ilc); void program_interrupt(CPUS390XState *env, uint32_t code, int ilc);
/* temporary wrappers */
uint32_t cpu_ldub_data(CPUS390XState *env, target_ulong ptr);
uint32_t cpu_lduw_data(CPUS390XState *env, target_ulong ptr);
uint32_t cpu_ldl_data(CPUS390XState *env, target_ulong ptr);
uint64_t cpu_ldq_data(CPUS390XState *env, target_ulong ptr);
void cpu_stb_data(CPUS390XState *env, target_ulong ptr, uint32_t data);
void cpu_stw_data(CPUS390XState *env, target_ulong ptr, uint32_t data);
void cpu_stl_data(CPUS390XState *env, target_ulong ptr, uint32_t data);
void cpu_stq_data(CPUS390XState *env, target_ulong ptr, uint64_t data);
#endif #endif
target-s390x/fpu_helper.c
浏览文件 @ 449c0d70
此差异已折叠。
target-s390x/helper.h
浏览文件 @ 449c0d70
...@@ -45,70 +45,70 @@ DEF_HELPER_3(mvcle, i32, i32, i64, i32) ...@@ -45,70 +45,70 @@ DEF_HELPER_3(mvcle, i32, i32, i64, i32)
DEF_HELPER_3(clcle, i32, i32, i64, i32) DEF_HELPER_3(clcle, i32, i32, i64, i32)
DEF_HELPER_3(slb, i32, i32, i32, i32) DEF_HELPER_3(slb, i32, i32, i32, i32)
DEF_HELPER_4(slbg, i32, i32, i32, i64, i64) DEF_HELPER_4(slbg, i32, i32, i32, i64, i64)
DEF_HELPER_2(cefbr, void, i32, s32) DEF_HELPER_3(cefbr, void, env, i32, s32)
DEF_HELPER_2(cdfbr, void, i32, s32) DEF_HELPER_3(cdfbr, void, env, i32, s32)
DEF_HELPER_2(cxfbr, void, i32, s32) DEF_HELPER_3(cxfbr, void, env, i32, s32)
DEF_HELPER_2(cegbr, void, i32, s64) DEF_HELPER_3(cegbr, void, env, i32, s64)
DEF_HELPER_2(cdgbr, void, i32, s64) DEF_HELPER_3(cdgbr, void, env, i32, s64)
DEF_HELPER_2(cxgbr, void, i32, s64) DEF_HELPER_3(cxgbr, void, env, i32, s64)
DEF_HELPER_2(adbr, i32, i32, i32) DEF_HELPER_3(adbr, i32, env, i32, i32)
DEF_HELPER_2(aebr, i32, i32, i32) DEF_HELPER_3(aebr, i32, env, i32, i32)
DEF_HELPER_2(sebr, i32, i32, i32) DEF_HELPER_3(sebr, i32, env, i32, i32)
DEF_HELPER_2(sdbr, i32, i32, i32) DEF_HELPER_3(sdbr, i32, env, i32, i32)
DEF_HELPER_2(debr, void, i32, i32) DEF_HELPER_3(debr, void, env, i32, i32)
DEF_HELPER_2(dxbr, void, i32, i32) DEF_HELPER_3(dxbr, void, env, i32, i32)
DEF_HELPER_2(mdbr, void, i32, i32) DEF_HELPER_3(mdbr, void, env, i32, i32)
DEF_HELPER_2(mxbr, void, i32, i32) DEF_HELPER_3(mxbr, void, env, i32, i32)
DEF_HELPER_2(ldebr, void, i32, i32) DEF_HELPER_3(ldebr, void, env, i32, i32)
DEF_HELPER_2(ldxbr, void, i32, i32) DEF_HELPER_3(ldxbr, void, env, i32, i32)
DEF_HELPER_2(lxdbr, void, i32, i32) DEF_HELPER_3(lxdbr, void, env, i32, i32)
DEF_HELPER_2(ledbr, void, i32, i32) DEF_HELPER_3(ledbr, void, env, i32, i32)
DEF_HELPER_2(lexbr, void, i32, i32) DEF_HELPER_3(lexbr, void, env, i32, i32)
DEF_HELPER_2(lpebr, i32, i32, i32) DEF_HELPER_3(lpebr, i32, env, i32, i32)
DEF_HELPER_2(lpdbr, i32, i32, i32) DEF_HELPER_3(lpdbr, i32, env, i32, i32)
DEF_HELPER_2(lpxbr, i32, i32, i32) DEF_HELPER_3(lpxbr, i32, env, i32, i32)
DEF_HELPER_2(ltebr, i32, i32, i32) DEF_HELPER_3(ltebr, i32, env, i32, i32)
DEF_HELPER_2(ltdbr, i32, i32, i32) DEF_HELPER_3(ltdbr, i32, env, i32, i32)
DEF_HELPER_2(ltxbr, i32, i32, i32) DEF_HELPER_3(ltxbr, i32, env, i32, i32)
DEF_HELPER_2(lcebr, i32, i32, i32) DEF_HELPER_3(lcebr, i32, env, i32, i32)
DEF_HELPER_2(lcdbr, i32, i32, i32) DEF_HELPER_3(lcdbr, i32, env, i32, i32)
DEF_HELPER_2(lcxbr, i32, i32, i32) DEF_HELPER_3(lcxbr, i32, env, i32, i32)
DEF_HELPER_2(aeb, void, i32, i32) DEF_HELPER_3(aeb, void, env, i32, i32)
DEF_HELPER_2(deb, void, i32, i32) DEF_HELPER_3(deb, void, env, i32, i32)
DEF_HELPER_2(meeb, void, i32, i32) DEF_HELPER_3(meeb, void, env, i32, i32)
DEF_HELPER_2(cdb, i32, i32, i64) DEF_HELPER_3(cdb, i32, env, i32, i64)
DEF_HELPER_2(adb, i32, i32, i64) DEF_HELPER_3(adb, i32, env, i32, i64)
DEF_HELPER_2(seb, void, i32, i32) DEF_HELPER_3(seb, void, env, i32, i32)
DEF_HELPER_2(sdb, i32, i32, i64) DEF_HELPER_3(sdb, i32, env, i32, i64)
DEF_HELPER_2(mdb, void, i32, i64) DEF_HELPER_3(mdb, void, env, i32, i64)
DEF_HELPER_2(ddb, void, i32, i64) DEF_HELPER_3(ddb, void, env, i32, i64)
DEF_HELPER_FLAGS_2(cebr, TCG_CALL_PURE, i32, i32, i32) DEF_HELPER_FLAGS_3(cebr, TCG_CALL_PURE, i32, env, i32, i32)
DEF_HELPER_FLAGS_2(cdbr, TCG_CALL_PURE, i32, i32, i32) DEF_HELPER_FLAGS_3(cdbr, TCG_CALL_PURE, i32, env, i32, i32)
DEF_HELPER_FLAGS_2(cxbr, TCG_CALL_PURE, i32, i32, i32) DEF_HELPER_FLAGS_3(cxbr, TCG_CALL_PURE, i32, env, i32, i32)
DEF_HELPER_3(cgebr, i32, i32, i32, i32) DEF_HELPER_4(cgebr, i32, env, i32, i32, i32)
DEF_HELPER_3(cgdbr, i32, i32, i32, i32) DEF_HELPER_4(cgdbr, i32, env, i32, i32, i32)
DEF_HELPER_3(cgxbr, i32, i32, i32, i32) DEF_HELPER_4(cgxbr, i32, env, i32, i32, i32)
DEF_HELPER_1(lzer, void, i32) DEF_HELPER_2(lzer, void, env, i32)
DEF_HELPER_1(lzdr, void, i32) DEF_HELPER_2(lzdr, void, env, i32)
DEF_HELPER_1(lzxr, void, i32) DEF_HELPER_2(lzxr, void, env, i32)
DEF_HELPER_3(cfebr, i32, i32, i32, i32) DEF_HELPER_4(cfebr, i32, env, i32, i32, i32)
DEF_HELPER_3(cfdbr, i32, i32, i32, i32) DEF_HELPER_4(cfdbr, i32, env, i32, i32, i32)
DEF_HELPER_3(cfxbr, i32, i32, i32, i32) DEF_HELPER_4(cfxbr, i32, env, i32, i32, i32)
DEF_HELPER_2(axbr, i32, i32, i32) DEF_HELPER_3(axbr, i32, env, i32, i32)
DEF_HELPER_2(sxbr, i32, i32, i32) DEF_HELPER_3(sxbr, i32, env, i32, i32)
DEF_HELPER_2(meebr, void, i32, i32) DEF_HELPER_3(meebr, void, env, i32, i32)
DEF_HELPER_2(ddbr, void, i32, i32) DEF_HELPER_3(ddbr, void, env, i32, i32)
DEF_HELPER_3(madb, void, i32, i64, i32) DEF_HELPER_4(madb, void, env, i32, i64, i32)
DEF_HELPER_3(maebr, void, i32, i32, i32) DEF_HELPER_4(maebr, void, env, i32, i32, i32)
DEF_HELPER_3(madbr, void, i32, i32, i32) DEF_HELPER_4(madbr, void, env, i32, i32, i32)
DEF_HELPER_3(msdbr, void, i32, i32, i32) DEF_HELPER_4(msdbr, void, env, i32, i32, i32)
DEF_HELPER_2(ldeb, void, i32, i64) DEF_HELPER_3(ldeb, void, env, i32, i64)
DEF_HELPER_2(lxdb, void, i32, i64) DEF_HELPER_3(lxdb, void, env, i32, i64)
DEF_HELPER_FLAGS_2(tceb, TCG_CALL_PURE, i32, i32, i64) DEF_HELPER_FLAGS_3(tceb, TCG_CALL_PURE, i32, env, i32, i64)
DEF_HELPER_FLAGS_2(tcdb, TCG_CALL_PURE, i32, i32, i64) DEF_HELPER_FLAGS_3(tcdb, TCG_CALL_PURE, i32, env, i32, i64)
DEF_HELPER_FLAGS_2(tcxb, TCG_CALL_PURE, i32, i32, i64) DEF_HELPER_FLAGS_3(tcxb, TCG_CALL_PURE, i32, env, i32, i64)
DEF_HELPER_2(flogr, i32, i32, i64) DEF_HELPER_2(flogr, i32, i32, i64)
DEF_HELPER_2(sqdbr, void, i32, i32) DEF_HELPER_3(sqdbr, void, env, i32, i32)
DEF_HELPER_FLAGS_1(cvd, TCG_CALL_PURE|TCG_CALL_CONST, i64, s32) DEF_HELPER_FLAGS_1(cvd, TCG_CALL_PURE|TCG_CALL_CONST, i64, s32)
DEF_HELPER_3(unpk, void, i32, i64, i64) DEF_HELPER_3(unpk, void, i32, i64, i64)
DEF_HELPER_3(tr, void, i32, i64, i64) DEF_HELPER_3(tr, void, i32, i64, i64)
......
target-s390x/mem_helper.c
浏览文件 @ 449c0d70
...@@ -1188,3 +1188,52 @@ uint32_t HELPER(lra)(uint64_t addr, uint32_t r1) ...@@ -1188,3 +1188,52 @@ uint32_t HELPER(lra)(uint64_t addr, uint32_t r1)
} }
#endif #endif
/* temporary wrappers */
#if defined(CONFIG_USER_ONLY)
#define ldub_data(addr) ldub_raw(addr)
#define lduw_data(addr) lduw_raw(addr)
#define ldl_data(addr) ldl_raw(addr)
#define ldq_data(addr) ldq_raw(addr)
#define stb_data(addr, data) stb_raw(addr, data)
#define stw_data(addr, data) stw_raw(addr, data)
#define stl_data(addr, data) stl_raw(addr, data)
#define stq_data(addr, data) stq_raw(addr, data)
#endif
#define WRAP_LD(rettype, fn) \
rettype cpu_ ## fn(CPUS390XState *env1, target_ulong addr) \
{ \
CPUS390XState *saved_env; \
rettype ret; \
\
saved_env = env; \
env = env1; \
ret = fn(addr); \
env = saved_env; \
return ret; \
}
WRAP_LD(uint32_t, ldub_data)
WRAP_LD(uint32_t, lduw_data)
WRAP_LD(uint32_t, ldl_data)
WRAP_LD(uint64_t, ldq_data)
#undef WRAP_LD
#define WRAP_ST(datatype, fn) \
void cpu_ ## fn(CPUS390XState *env1, target_ulong addr, datatype val) \
{ \
CPUS390XState *saved_env; \
\
saved_env = env; \
env = env1; \
fn(addr, val); \
env = saved_env; \
}
WRAP_ST(uint32_t, stb_data)
WRAP_ST(uint32_t, stw_data)
WRAP_ST(uint32_t, stl_data)
WRAP_ST(uint64_t, stq_data)
#undef WRAP_ST
target-s390x/translate.c
浏览文件 @ 449c0d70
...@@ -2206,11 +2206,11 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2, ...@@ -2206,11 +2206,11 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
switch (op) { switch (op) {
case 0x4: /* LDEB R1,D2(X2,B2) [RXE] */ case 0x4: /* LDEB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_ldeb(tmp_r1, addr); gen_helper_ldeb(cpu_env, tmp_r1, addr);
break; break;
case 0x5: /* LXDB R1,D2(X2,B2) [RXE] */ case 0x5: /* LXDB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_lxdb(tmp_r1, addr); gen_helper_lxdb(cpu_env, tmp_r1, addr);
break; break;
case 0x9: /* CEB R1,D2(X2,B2) [RXE] */ case 0x9: /* CEB R1,D2(X2,B2) [RXE] */
tmp = tcg_temp_new_i64(); tmp = tcg_temp_new_i64();
...@@ -2225,7 +2225,7 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2, ...@@ -2225,7 +2225,7 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
tmp32 = tcg_temp_new_i32(); tmp32 = tcg_temp_new_i32();
tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s)); tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s));
tcg_gen_trunc_i64_i32(tmp32, tmp); tcg_gen_trunc_i64_i32(tmp32, tmp);
gen_helper_aeb(tmp_r1, tmp32); gen_helper_aeb(cpu_env, tmp_r1, tmp32);
tcg_temp_free_i64(tmp); tcg_temp_free_i64(tmp);
tcg_temp_free_i32(tmp32); tcg_temp_free_i32(tmp32);
...@@ -2238,7 +2238,7 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2, ...@@ -2238,7 +2238,7 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
tmp32 = tcg_temp_new_i32(); tmp32 = tcg_temp_new_i32();
tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s)); tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s));
tcg_gen_trunc_i64_i32(tmp32, tmp); tcg_gen_trunc_i64_i32(tmp32, tmp);
gen_helper_seb(tmp_r1, tmp32); gen_helper_seb(cpu_env, tmp_r1, tmp32);
tcg_temp_free_i64(tmp); tcg_temp_free_i64(tmp);
tcg_temp_free_i32(tmp32); tcg_temp_free_i32(tmp32);
...@@ -2251,23 +2251,23 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2, ...@@ -2251,23 +2251,23 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
tmp32 = tcg_temp_new_i32(); tmp32 = tcg_temp_new_i32();
tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s)); tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s));
tcg_gen_trunc_i64_i32(tmp32, tmp); tcg_gen_trunc_i64_i32(tmp32, tmp);
gen_helper_deb(tmp_r1, tmp32); gen_helper_deb(cpu_env, tmp_r1, tmp32);
tcg_temp_free_i64(tmp); tcg_temp_free_i64(tmp);
tcg_temp_free_i32(tmp32); tcg_temp_free_i32(tmp32);
break; break;
case 0x10: /* TCEB R1,D2(X2,B2) [RXE] */ case 0x10: /* TCEB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_tceb(cc_op, tmp_r1, addr); gen_helper_tceb(cc_op, cpu_env, tmp_r1, addr);
set_cc_static(s); set_cc_static(s);
break; break;
case 0x11: /* TCDB R1,D2(X2,B2) [RXE] */ case 0x11: /* TCDB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_tcdb(cc_op, tmp_r1, addr); gen_helper_tcdb(cc_op, cpu_env, tmp_r1, addr);
set_cc_static(s); set_cc_static(s);
break; break;
case 0x12: /* TCXB R1,D2(X2,B2) [RXE] */ case 0x12: /* TCXB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_tcxb(cc_op, tmp_r1, addr); gen_helper_tcxb(cc_op, cpu_env, tmp_r1, addr);
set_cc_static(s); set_cc_static(s);
break; break;
case 0x17: /* MEEB R1,D2(X2,B2) [RXE] */ case 0x17: /* MEEB R1,D2(X2,B2) [RXE] */
...@@ -2275,38 +2275,38 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2, ...@@ -2275,38 +2275,38 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
tmp32 = tcg_temp_new_i32(); tmp32 = tcg_temp_new_i32();
tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s)); tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s));
tcg_gen_trunc_i64_i32(tmp32, tmp); tcg_gen_trunc_i64_i32(tmp32, tmp);
gen_helper_meeb(tmp_r1, tmp32); gen_helper_meeb(cpu_env, tmp_r1, tmp32);
tcg_temp_free_i64(tmp); tcg_temp_free_i64(tmp);
tcg_temp_free_i32(tmp32); tcg_temp_free_i32(tmp32);
break; break;
case 0x19: /* CDB R1,D2(X2,B2) [RXE] */ case 0x19: /* CDB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_cdb(cc_op, tmp_r1, addr); gen_helper_cdb(cc_op, cpu_env, tmp_r1, addr);
set_cc_static(s); set_cc_static(s);
break; break;
case 0x1a: /* ADB R1,D2(X2,B2) [RXE] */ case 0x1a: /* ADB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_adb(cc_op, tmp_r1, addr); gen_helper_adb(cc_op, cpu_env, tmp_r1, addr);
set_cc_static(s); set_cc_static(s);
break; break;
case 0x1b: /* SDB R1,D2(X2,B2) [RXE] */ case 0x1b: /* SDB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_sdb(cc_op, tmp_r1, addr); gen_helper_sdb(cc_op, cpu_env, tmp_r1, addr);
set_cc_static(s); set_cc_static(s);
break; break;
case 0x1c: /* MDB R1,D2(X2,B2) [RXE] */ case 0x1c: /* MDB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_mdb(tmp_r1, addr); gen_helper_mdb(cpu_env, tmp_r1, addr);
break; break;
case 0x1d: /* DDB R1,D2(X2,B2) [RXE] */ case 0x1d: /* DDB R1,D2(X2,B2) [RXE] */
potential_page_fault(s); potential_page_fault(s);
gen_helper_ddb(tmp_r1, addr); gen_helper_ddb(cpu_env, tmp_r1, addr);
break; break;
case 0x1e: /* MADB R1,R3,D2(X2,B2) [RXF] */ case 0x1e: /* MADB R1,R3,D2(X2,B2) [RXF] */
/* for RXF insns, r1 is R3 and r1b is R1 */ /* for RXF insns, r1 is R3 and r1b is R1 */
tmp32 = tcg_const_i32(r1b); tmp32 = tcg_const_i32(r1b);
potential_page_fault(s); potential_page_fault(s);
gen_helper_madb(tmp32, addr, tmp_r1); gen_helper_madb(cpu_env, tmp32, addr, tmp_r1);
tcg_temp_free_i32(tmp32); tcg_temp_free_i32(tmp32);
break; break;
default: default:
...@@ -3001,14 +3001,14 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3001,14 +3001,14 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
#define FP_HELPER(i) \ #define FP_HELPER(i) \
tmp32_1 = tcg_const_i32(r1); \ tmp32_1 = tcg_const_i32(r1); \
tmp32_2 = tcg_const_i32(r2); \ tmp32_2 = tcg_const_i32(r2); \
gen_helper_ ## i (tmp32_1, tmp32_2); \ gen_helper_ ## i(cpu_env, tmp32_1, tmp32_2); \
tcg_temp_free_i32(tmp32_1); \ tcg_temp_free_i32(tmp32_1); \
tcg_temp_free_i32(tmp32_2); tcg_temp_free_i32(tmp32_2);
#define FP_HELPER_CC(i) \ #define FP_HELPER_CC(i) \
tmp32_1 = tcg_const_i32(r1); \ tmp32_1 = tcg_const_i32(r1); \
tmp32_2 = tcg_const_i32(r2); \ tmp32_2 = tcg_const_i32(r2); \
gen_helper_ ## i (cc_op, tmp32_1, tmp32_2); \ gen_helper_ ## i(cc_op, cpu_env, tmp32_1, tmp32_2); \
set_cc_static(s); \ set_cc_static(s); \
tcg_temp_free_i32(tmp32_1); \ tcg_temp_free_i32(tmp32_1); \
tcg_temp_free_i32(tmp32_2); tcg_temp_free_i32(tmp32_2);
...@@ -3080,13 +3080,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3080,13 +3080,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
tmp32_3 = tcg_const_i32(r1); tmp32_3 = tcg_const_i32(r1);
switch (op) { switch (op) {
case 0xe: case 0xe:
gen_helper_maebr(tmp32_1, tmp32_3, tmp32_2); gen_helper_maebr(cpu_env, tmp32_1, tmp32_3, tmp32_2);
break; break;
case 0x1e: case 0x1e:
gen_helper_madbr(tmp32_1, tmp32_3, tmp32_2); gen_helper_madbr(cpu_env, tmp32_1, tmp32_3, tmp32_2);
break; break;
case 0x1f: case 0x1f:
gen_helper_msdbr(tmp32_1, tmp32_3, tmp32_2); gen_helper_msdbr(cpu_env, tmp32_1, tmp32_3, tmp32_2);
break; break;
default: default:
tcg_abort(); tcg_abort();
...@@ -3138,17 +3138,17 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3138,17 +3138,17 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
break; break;
case 0x74: /* LZER R1 [RRE] */ case 0x74: /* LZER R1 [RRE] */
tmp32_1 = tcg_const_i32(r1); tmp32_1 = tcg_const_i32(r1);
gen_helper_lzer(tmp32_1); gen_helper_lzer(cpu_env, tmp32_1);
tcg_temp_free_i32(tmp32_1); tcg_temp_free_i32(tmp32_1);
break; break;
case 0x75: /* LZDR R1 [RRE] */ case 0x75: /* LZDR R1 [RRE] */
tmp32_1 = tcg_const_i32(r1); tmp32_1 = tcg_const_i32(r1);
gen_helper_lzdr(tmp32_1); gen_helper_lzdr(cpu_env, tmp32_1);
tcg_temp_free_i32(tmp32_1); tcg_temp_free_i32(tmp32_1);
break; break;
case 0x76: /* LZXR R1 [RRE] */ case 0x76: /* LZXR R1 [RRE] */
tmp32_1 = tcg_const_i32(r1); tmp32_1 = tcg_const_i32(r1);
gen_helper_lzxr(tmp32_1); gen_helper_lzxr(cpu_env, tmp32_1);
tcg_temp_free_i32(tmp32_1); tcg_temp_free_i32(tmp32_1);
break; break;
case 0x84: /* SFPC R1 [RRE] */ case 0x84: /* SFPC R1 [RRE] */
...@@ -3169,13 +3169,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3169,13 +3169,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
tmp32_2 = load_reg32(r2); tmp32_2 = load_reg32(r2);
switch (op) { switch (op) {
case 0x94: case 0x94:
gen_helper_cefbr(tmp32_1, tmp32_2); gen_helper_cefbr(cpu_env, tmp32_1, tmp32_2);
break; break;
case 0x95: case 0x95:
gen_helper_cdfbr(tmp32_1, tmp32_2); gen_helper_cdfbr(cpu_env, tmp32_1, tmp32_2);
break; break;
case 0x96: case 0x96:
gen_helper_cxfbr(tmp32_1, tmp32_2); gen_helper_cxfbr(cpu_env, tmp32_1, tmp32_2);
break; break;
default: default:
tcg_abort(); tcg_abort();
...@@ -3191,13 +3191,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3191,13 +3191,13 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
tmp32_3 = tcg_const_i32(m3); tmp32_3 = tcg_const_i32(m3);
switch (op) { switch (op) {
case 0x98: case 0x98:
gen_helper_cfebr(cc_op, tmp32_1, tmp32_2, tmp32_3); gen_helper_cfebr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
break; break;
case 0x99: case 0x99:
gen_helper_cfdbr(cc_op, tmp32_1, tmp32_2, tmp32_3); gen_helper_cfdbr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
break; break;
case 0x9a: case 0x9a:
gen_helper_cfxbr(cc_op, tmp32_1, tmp32_2, tmp32_3); gen_helper_cfxbr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
break; break;
default: default:
tcg_abort(); tcg_abort();
...@@ -3213,10 +3213,10 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3213,10 +3213,10 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
tmp = load_reg(r2); tmp = load_reg(r2);
switch (op) { switch (op) {
case 0xa4: case 0xa4:
gen_helper_cegbr(tmp32_1, tmp); gen_helper_cegbr(cpu_env, tmp32_1, tmp);
break; break;
case 0xa5: case 0xa5:
gen_helper_cdgbr(tmp32_1, tmp); gen_helper_cdgbr(cpu_env, tmp32_1, tmp);
break; break;
default: default:
tcg_abort(); tcg_abort();
...@@ -3227,7 +3227,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3227,7 +3227,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
case 0xa6: /* CXGBR R1,R2 [RRE] */ case 0xa6: /* CXGBR R1,R2 [RRE] */
tmp32_1 = tcg_const_i32(r1); tmp32_1 = tcg_const_i32(r1);
tmp = load_reg(r2); tmp = load_reg(r2);
gen_helper_cxgbr(tmp32_1, tmp); gen_helper_cxgbr(cpu_env, tmp32_1, tmp);
tcg_temp_free_i32(tmp32_1); tcg_temp_free_i32(tmp32_1);
tcg_temp_free_i64(tmp); tcg_temp_free_i64(tmp);
break; break;
...@@ -3235,7 +3235,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3235,7 +3235,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
tmp32_1 = tcg_const_i32(r1); tmp32_1 = tcg_const_i32(r1);
tmp32_2 = tcg_const_i32(r2); tmp32_2 = tcg_const_i32(r2);
tmp32_3 = tcg_const_i32(m3); tmp32_3 = tcg_const_i32(m3);
gen_helper_cgebr(cc_op, tmp32_1, tmp32_2, tmp32_3); gen_helper_cgebr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
set_cc_static(s); set_cc_static(s);
tcg_temp_free_i32(tmp32_1); tcg_temp_free_i32(tmp32_1);
tcg_temp_free_i32(tmp32_2); tcg_temp_free_i32(tmp32_2);
...@@ -3245,7 +3245,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3245,7 +3245,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
tmp32_1 = tcg_const_i32(r1); tmp32_1 = tcg_const_i32(r1);
tmp32_2 = tcg_const_i32(r2); tmp32_2 = tcg_const_i32(r2);
tmp32_3 = tcg_const_i32(m3); tmp32_3 = tcg_const_i32(m3);
gen_helper_cgdbr(cc_op, tmp32_1, tmp32_2, tmp32_3); gen_helper_cgdbr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
set_cc_static(s); set_cc_static(s);
tcg_temp_free_i32(tmp32_1); tcg_temp_free_i32(tmp32_1);
tcg_temp_free_i32(tmp32_2); tcg_temp_free_i32(tmp32_2);
...@@ -3255,7 +3255,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) ...@@ -3255,7 +3255,7 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2)
tmp32_1 = tcg_const_i32(r1); tmp32_1 = tcg_const_i32(r1);
tmp32_2 = tcg_const_i32(r2); tmp32_2 = tcg_const_i32(r2);
tmp32_3 = tcg_const_i32(m3); tmp32_3 = tcg_const_i32(m3);
gen_helper_cgxbr(cc_op, tmp32_1, tmp32_2, tmp32_3); gen_helper_cgxbr(cc_op, cpu_env, tmp32_1, tmp32_2, tmp32_3);
set_cc_static(s); set_cc_static(s);
tcg_temp_free_i32(tmp32_1); tcg_temp_free_i32(tmp32_1);
tcg_temp_free_i32(tmp32_2); tcg_temp_free_i32(tmp32_2);
......
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