提交 43bb98bf 编写于 作者: B Blue Swirl

Sparc: improve CPU register dump

Common:
 * Remove unnecessary 0x prefix
 * Print %y
 * Fix NZVC flag print order to match CPU bit order

Sparc64 specific:
 * Print registers without line wrapping
 * Print %f40-%f63
 * Pretty print CCR flags
 * Print %fsr and %fprs in full precision
 * More consistent formatting
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
上级 0ddbc96e
...@@ -1409,6 +1409,21 @@ void sparc_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)) ...@@ -1409,6 +1409,21 @@ void sparc_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
"fpu_version mmu_version nwindows\n"); "fpu_version mmu_version nwindows\n");
} }
static void cpu_print_cc(FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
uint32_t cc)
{
cpu_fprintf(f, "%c%c%c%c", cc & PSR_NEG? 'N' : '-',
cc & PSR_ZERO? 'Z' : '-', cc & PSR_OVF? 'V' : '-',
cc & PSR_CARRY? 'C' : '-');
}
#ifdef TARGET_SPARC64
#define REGS_PER_LINE 4
#else
#define REGS_PER_LINE 8
#endif
void cpu_dump_state(CPUState *env, FILE *f, void cpu_dump_state(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...), int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
int flags) int flags)
...@@ -1418,26 +1433,32 @@ void cpu_dump_state(CPUState *env, FILE *f, ...@@ -1418,26 +1433,32 @@ void cpu_dump_state(CPUState *env, FILE *f,
cpu_fprintf(f, "pc: " TARGET_FMT_lx " npc: " TARGET_FMT_lx "\n", env->pc, cpu_fprintf(f, "pc: " TARGET_FMT_lx " npc: " TARGET_FMT_lx "\n", env->pc,
env->npc); env->npc);
cpu_fprintf(f, "General Registers:\n"); cpu_fprintf(f, "General Registers:\n");
for (i = 0; i < 4; i++)
cpu_fprintf(f, "%%g%c: " TARGET_FMT_lx "\t", i + '0', env->gregs[i]); for (i = 0; i < 8; i++) {
cpu_fprintf(f, "\n"); if (i % REGS_PER_LINE == 0) {
for (; i < 8; i++) cpu_fprintf(f, "%%g%d-%d:", i, i + REGS_PER_LINE - 1);
cpu_fprintf(f, "%%g%c: " TARGET_FMT_lx "\t", i + '0', env->gregs[i]); }
cpu_fprintf(f, " " TARGET_FMT_lx, env->gregs[i]);
if (i % REGS_PER_LINE == REGS_PER_LINE - 1) {
cpu_fprintf(f, "\n");
}
}
cpu_fprintf(f, "\nCurrent Register Window:\n"); cpu_fprintf(f, "\nCurrent Register Window:\n");
for (x = 0; x < 3; x++) { for (x = 0; x < 3; x++) {
for (i = 0; i < 4; i++) for (i = 0; i < 8; i++) {
cpu_fprintf(f, "%%%c%d: " TARGET_FMT_lx "\t", if (i % REGS_PER_LINE == 0) {
(x == 0 ? 'o' : (x == 1 ? 'l' : 'i')), i, cpu_fprintf(f, "%%%c%d-%d: ",
env->regwptr[i + x * 8]); x == 0 ? 'o' : (x == 1 ? 'l' : 'i'),
cpu_fprintf(f, "\n"); i, i + REGS_PER_LINE - 1);
for (; i < 8; i++) }
cpu_fprintf(f, "%%%c%d: " TARGET_FMT_lx "\t", cpu_fprintf(f, TARGET_FMT_lx " ", env->regwptr[i + x * 8]);
(x == 0 ? 'o' : x == 1 ? 'l' : 'i'), i, if (i % REGS_PER_LINE == REGS_PER_LINE - 1) {
env->regwptr[i + x * 8]); cpu_fprintf(f, "\n");
cpu_fprintf(f, "\n"); }
}
} }
cpu_fprintf(f, "\nFloating Point Registers:\n"); cpu_fprintf(f, "\nFloating Point Registers:\n");
for (i = 0; i < 32; i++) { for (i = 0; i < TARGET_FPREGS; i++) {
if ((i & 3) == 0) if ((i & 3) == 0)
cpu_fprintf(f, "%%f%02d:", i); cpu_fprintf(f, "%%f%02d:", i);
cpu_fprintf(f, " %016f", *(float *)&env->fpr[i]); cpu_fprintf(f, " %016f", *(float *)&env->fpr[i]);
...@@ -1445,22 +1466,26 @@ void cpu_dump_state(CPUState *env, FILE *f, ...@@ -1445,22 +1466,26 @@ void cpu_dump_state(CPUState *env, FILE *f,
cpu_fprintf(f, "\n"); cpu_fprintf(f, "\n");
} }
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
cpu_fprintf(f, "pstate: 0x%08x ccr: 0x%02x asi: 0x%02x tl: %d fprs: %d\n", cpu_fprintf(f, "pstate: %08x ccr: %02x (icc: ", env->pstate,
env->pstate, GET_CCR(env), env->asi, env->tl, env->fprs); GET_CCR(env));
cpu_fprintf(f, "pil=%x\n", env->psrpil); cpu_print_cc(f, cpu_fprintf, GET_CCR(env) << PSR_CARRY_SHIFT);
cpu_fprintf(f, "cansave: %d canrestore: %d otherwin: %d wstate %d " cpu_fprintf(f, " xcc: ");
"cleanwin %d cwp %d\n", cpu_print_cc(f, cpu_fprintf, GET_CCR(env) << (PSR_CARRY_SHIFT - 4));
cpu_fprintf(f, ") asi: %02x tl: %d pil: %x\n", env->asi, env->tl,
env->psrpil);
cpu_fprintf(f, "cansave: %d canrestore: %d otherwin: %d wstate: %d "
"cleanwin: %d cwp: %d\n",
env->cansave, env->canrestore, env->otherwin, env->wstate, env->cansave, env->canrestore, env->otherwin, env->wstate,
env->cleanwin, env->nwindows - 1 - env->cwp); env->cleanwin, env->nwindows - 1 - env->cwp);
cpu_fprintf(f, "fsr: " TARGET_FMT_lx " y: " TARGET_FMT_lx " fprs: "
TARGET_FMT_lx "\n", env->fsr, env->y, env->fprs);
#else #else
cpu_fprintf(f, "psr: %08x (icc: ", GET_PSR(env));
#define GET_FLAG(a,b) ((env->psr & a)?b:'-') cpu_print_cc(f, cpu_fprintf, GET_PSR(env));
cpu_fprintf(f, " SPE: %c%c%c) wim: %08x\n", env->psrs? 'S' : '-',
cpu_fprintf(f, "psr: 0x%08x -> %c%c%c%c %c%c%c wim: 0x%08x\n", env->psrps? 'P' : '-', env->psret? 'E' : '-',
GET_PSR(env), GET_FLAG(PSR_ZERO, 'Z'), GET_FLAG(PSR_OVF, 'V'), env->wim);
GET_FLAG(PSR_NEG, 'N'), GET_FLAG(PSR_CARRY, 'C'), cpu_fprintf(f, "fsr: " TARGET_FMT_lx " y: " TARGET_FMT_lx "\n",
env->psrs?'S':'-', env->psrps?'P':'-', env->fsr, env->y);
env->psret?'E':'-', env->wim);
#endif #endif
cpu_fprintf(f, "fsr: 0x%08x\n", env->fsr);
} }
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