Don't set IRQs on device reset and loadvm/savevm

Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

hw/esp.c

@@ -401,8 +401,6 @@ static void esp_reset(void *opaque)
 {
     ESPState *s = opaque;
 
-    esp_lower_irq(s);
-
     memset(s->rregs, 0, ESP_REGS);
     memset(s->wregs, 0, ESP_REGS);
     s->rregs[ESP_TCHI] = TCHI_FAS100A; // Indicate fas100a

hw/iommu.c

@@ -362,7 +362,6 @@ static void iommu_reset(void *opaque)
     s->regs[IOMMU_AFSR] = IOMMU_AFSR_RESV;
     s->regs[IOMMU_AER] = IOMMU_AER_EN_P0_ARB | IOMMU_AER_EN_P1_ARB;
     s->regs[IOMMU_MASK_ID] = IOMMU_TS_MASK;
-    qemu_irq_lower(s->irq);
 }
 
 void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq)

hw/sbi.c

@@ -47,10 +47,6 @@ typedef struct SBIState {
 
 #define SBI_SIZE (SBI_NREGS * 4)
 
-static void sbi_check_interrupts(void *opaque)
-{
-}
-
 static void sbi_set_irq(void *opaque, int irq, int level)
 {
 }
@@ -122,7 +118,6 @@ static int sbi_load(QEMUFile *f, void *opaque, int version_id)
     for (i = 0; i < MAX_CPUS; i++) {
         qemu_get_be32s(f, &s->intreg_pending[i]);
     }
-    sbi_check_interrupts(s);
 
     return 0;
 }
@@ -135,7 +130,6 @@ static void sbi_reset(void *opaque)
     for (i = 0; i < MAX_CPUS; i++) {
         s->intreg_pending[i] = 0;
     }
-    sbi_check_interrupts(s);
 }
 
 void *sbi_init(target_phys_addr_t addr, qemu_irq **irq, qemu_irq **cpu_irq,

hw/slavio_timer.c

@@ -359,7 +359,6 @@ static void slavio_timer_reset(void *opaque)
         ptimer_run(s->timer, 0);
     }
     s->running = 1;
-    qemu_irq_lower(s->irq);
 }
 
 static SLAVIO_TIMERState *slavio_timer_init(target_phys_addr_t addr,

hw/sun4c_intctl.c

@@ -183,7 +183,6 @@ static int sun4c_intctl_load(QEMUFile *f, void *opaque, int version_id)
 
     qemu_get_8s(f, &s->reg);
     qemu_get_8s(f, &s->pending);
-    sun4c_check_interrupts(s);
 
     return 0;
 }
@@ -194,7 +193,6 @@ static void sun4c_intctl_reset(void *opaque)
 
     s->reg = 1;
     s->pending = 0;
-    sun4c_check_interrupts(s);
 }
 
 void *sun4c_intctl_init(target_phys_addr_t addr, qemu_irq **irq,