提交 4036b7d1 编写于 作者: P Peter Maydell

target/arm: Use isar_feature function for testing AA32HPD feature

Now we have moved ID_MMFR4 into the ARMISARegisters struct, we
can define and use an isar_feature for the presence of the
ARMv8.2-AA32HPD feature, rather than open-coding the test.

While we're here, correct a comment typo which missed an 'A'
from the feature name.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
Message-id: 20200214175116.9164-20-peter.maydell@linaro.org
上级 10054016
...@@ -3526,6 +3526,11 @@ static inline bool isar_feature_aa32_pmu_8_4(const ARMISARegisters *id) ...@@ -3526,6 +3526,11 @@ static inline bool isar_feature_aa32_pmu_8_4(const ARMISARegisters *id)
FIELD_EX32(id->id_dfr0, ID_DFR0, PERFMON) != 0xf; FIELD_EX32(id->id_dfr0, ID_DFR0, PERFMON) != 0xf;
} }
static inline bool isar_feature_aa32_hpd(const ARMISARegisters *id)
{
return FIELD_EX32(id->id_mmfr4, ID_MMFR4, HPDS) != 0;
}
/* /*
* 64-bit feature tests via id registers. * 64-bit feature tests via id registers.
*/ */
......
...@@ -7408,8 +7408,8 @@ void register_cp_regs_for_features(ARMCPU *cpu) ...@@ -7408,8 +7408,8 @@ void register_cp_regs_for_features(ARMCPU *cpu)
} else { } else {
define_arm_cp_regs(cpu, vmsa_pmsa_cp_reginfo); define_arm_cp_regs(cpu, vmsa_pmsa_cp_reginfo);
define_arm_cp_regs(cpu, vmsa_cp_reginfo); define_arm_cp_regs(cpu, vmsa_cp_reginfo);
/* TTCBR2 is introduced with ARMv8.2-A32HPD. */ /* TTCBR2 is introduced with ARMv8.2-AA32HPD. */
if (FIELD_EX32(cpu->isar.id_mmfr4, ID_MMFR4, HPDS) != 0) { if (cpu_isar_feature(aa32_hpd, cpu)) {
define_one_arm_cp_reg(cpu, &ttbcr2_reginfo); define_one_arm_cp_reg(cpu, &ttbcr2_reginfo);
} }
} }
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册