Add a TI TSC2102 chip (touchscreen/ADC/audio-CODEC controller).

Fix GPIO memory mapping address and register width.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3484 c046a42c-6fe2-441c-8c8c-71466251a162

Makefile.target

@@ -518,8 +518,8 @@ VL_OBJS+= arm_gic.o realview.o arm_sysctl.o
 VL_OBJS+= arm-semi.o
 VL_OBJS+= pxa2xx.o pxa2xx_pic.o pxa2xx_gpio.o pxa2xx_timer.o pxa2xx_dma.o
 VL_OBJS+= pxa2xx_lcd.o pxa2xx_mmci.o pxa2xx_pcmcia.o max111x.o max7310.o
-VL_OBJS+= spitz.o ads7846.o ide.o serial.o nand.o $(AUDIODRV) wm8750.o
-VL_OBJS+= omap.o omap_lcdc.o omap1_clk.o omap_mmc.o palm.o ecc.o
+VL_OBJS+= spitz.o ads7846.o ide.o serial.o nand.o ecc.o $(AUDIODRV) wm8750.o
+VL_OBJS+= omap.o omap_lcdc.o omap1_clk.o omap_mmc.o palm.o tsc210x.o
 CPPFLAGS += -DHAS_AUDIO
 endif
 ifeq ($(TARGET_BASE_ARCH), sh4)

hw/omap.c

@@ -3184,16 +3184,17 @@ static void omap_gpio_write(void *opaque, target_phys_addr_t addr,
     }
 }
 
+/* *Some* sources say the memory region is 32-bit.  */
 static CPUReadMemoryFunc *omap_gpio_readfn[] = {
+    omap_badwidth_read16,
     omap_gpio_read,
-    omap_badwidth_read32,
-    omap_badwidth_read32,
+    omap_badwidth_read16,
 };
 
 static CPUWriteMemoryFunc *omap_gpio_writefn[] = {
+    omap_badwidth_write16,
     omap_gpio_write,
-    omap_badwidth_write32,
-    omap_badwidth_write32,
+    omap_badwidth_write16,
 };
 
 void omap_gpio_reset(struct omap_gpio_s *s)
@@ -3551,7 +3552,7 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
                     s->irq[1][OMAP_INT_KEYBOARD], s->irq[1][OMAP_INT_MPUIO],
                     s->wakeup, omap_findclk(s, "clk32-kHz"));
 
-    s->gpio = omap_gpio_init(0xfffcf000, s->irq[0][OMAP_INT_GPIO_BANK1],
+    s->gpio = omap_gpio_init(0xfffce000, s->irq[0][OMAP_INT_GPIO_BANK1],
                     omap_findclk(s, "mpuper_ck"));
 
     s->microwire = omap_uwire_init(0xfffb3000, &s->irq[1][OMAP_INT_uWireTX],

hw/palm.c

@@ -76,8 +76,21 @@ static CPUWriteMemoryFunc *static_writefn[] = {
 #define PALMTE_MMC2_GPIO	7
 #define PALMTE_MMC3_GPIO	11
 
+static void palmte_pintdav(void *opaque, int line, int level)
+{
+    struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque;
+
+    qemu_set_irq(omap_gpio_in_get(cpu->gpio)[PALMTE_PINTDAV_GPIO],
+                    !level);
+}
+
 static void palmte_microwire_setup(struct omap_mpu_state_s *cpu)
 {
+    omap_uwire_attach(
+                    cpu->microwire,
+                    tsc2102_init(
+                            qemu_allocate_irqs(palmte_pintdav, cpu, 1)[0]),
+                    0);
 }
 
 static struct {

hw/pxa.h

@@ -4,7 +4,7 @@
  * Copyright (c) 2006 Openedhand Ltd.
  * Written by Andrzej Zaborowski <balrog@zabor.org>
  *
- * This code is licenced under the GPL.
+ * This code is licenced under the GNU GPL v2.
  */
 #ifndef PXA_H
 # define PXA_H			"pxa.h"

vl.h

@@ -1663,6 +1663,9 @@ void qemu_get_ptimer(QEMUFile *f, ptimer_state *s);
 
 #include "hw/omap.h"
 
+/* tsc210x.c */
+struct uwire_slave_s *tsc2102_init(qemu_irq pint);
+
 /* mcf_uart.c */
 uint32_t mcf_uart_read(void *opaque, target_phys_addr_t addr);
 void mcf_uart_write(void *opaque, target_phys_addr_t addr, uint32_t val);