char/cadence_uart: Implement Tx flow control
If the UART back-end blocks, buffer in the Tx FIFO to try again later. This stops the IO-thread busy waiting on char back-ends (which causes all sorts of performance problems). Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 4bea048b3ab38425701d82ccc1ab92545c26b79c.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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