提交 2700a976 编写于 作者: P Peter Maydell

Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-06-03' into staging

trivial patches for 2015-06-03

# gpg: Signature made Wed Jun  3 14:07:47 2015 BST using RSA key ID A4C3D7DB
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
# gpg:                 aka "Michael Tokarev <mjt@debian.org>"

* remotes/mjt/tags/pull-trivial-patches-2015-06-03: (30 commits)
  configure: postfix --extra-cflags to QEMU_CFLAGS
  cadence_gem: Fix Rx buffer size field mask
  slirp: use less predictable directory name in /tmp for smb config (CVE-2015-4037)
  translate-all: delete prototype for non-existent function
  Add -incoming help text
  hw/display/tc6393xb.c: Fix misusing qemu_allocate_irqs for single irq
  hw/arm/nseries.c: Fix misusing qemu_allocate_irqs for single irq
  hw/alpha/typhoon.c: Fix misusing qemu_allocate_irqs for single irq
  hw/unicore32/puv3.c: Fix misusing qemu_allocate_irqs for single irq
  hw/lm32/milkymist.c: Fix misusing qemu_allocate_irqs for single irq
  hw/lm32/lm32_boards.c: Fix misusing qemu_allocate_irqs for single irq
  hw/ppc/prep.c: Fix misusing qemu_allocate_irqs for single irq
  hw/sparc/sun4m.c: Fix misusing qemu_allocate_irqs for single irq
  hw/timer/arm_timer.c: Fix misusing qemu_allocate_irqs for single irq
  hw/isa/i82378.c: Fix misusing qemu_allocate_irqs for single irq
  hw/isa/lpc_ich9.c: Fix misusing qemu_allocate_irqs for single irq
  hw/i386/pc: Fix misusing qemu_allocate_irqs for single irq
  hw/intc/exynos4210_gic.c: Fix memory leak by adjusting order
  hw/arm/omap_sx1.c: Fix memory leak spotted by valgrind
  hw/ppc/e500.c: Fix memory leak
  ...
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
...@@ -76,6 +76,8 @@ common-obj-$(CONFIG_SECCOMP) += qemu-seccomp.o ...@@ -76,6 +76,8 @@ common-obj-$(CONFIG_SECCOMP) += qemu-seccomp.o
common-obj-$(CONFIG_SMARTCARD_NSS) += $(libcacard-y) common-obj-$(CONFIG_SMARTCARD_NSS) += $(libcacard-y)
common-obj-$(CONFIG_FDT) += device_tree.o
###################################################################### ######################################################################
# qapi # qapi
......
...@@ -129,7 +129,6 @@ ifdef CONFIG_SOFTMMU ...@@ -129,7 +129,6 @@ ifdef CONFIG_SOFTMMU
obj-y += arch_init.o cpus.o monitor.o gdbstub.o balloon.o ioport.o numa.o obj-y += arch_init.o cpus.o monitor.o gdbstub.o balloon.o ioport.o numa.o
obj-y += qtest.o bootdevice.o obj-y += qtest.o bootdevice.o
obj-y += hw/ obj-y += hw/
obj-$(CONFIG_FDT) += device_tree.o
obj-$(CONFIG_KVM) += kvm-all.o obj-$(CONFIG_KVM) += kvm-all.o
obj-y += memory.o savevm.o cputlb.o obj-y += memory.o savevm.o cputlb.o
obj-y += memory_mapping.o obj-y += memory_mapping.o
......
...@@ -1323,13 +1323,6 @@ static int iscsi_open(BlockDriverState *bs, QDict *options, int flags, ...@@ -1323,13 +1323,6 @@ static int iscsi_open(BlockDriverState *bs, QDict *options, int flags,
const char *filename; const char *filename;
int i, ret = 0; int i, ret = 0;
if ((BDRV_SECTOR_SIZE % 512) != 0) {
error_setg(errp, "iSCSI: Invalid BDRV_SECTOR_SIZE. "
"BDRV_SECTOR_SIZE(%lld) is not a multiple "
"of 512", BDRV_SECTOR_SIZE);
return -EINVAL;
}
opts = qemu_opts_create(&runtime_opts, NULL, 0, &error_abort); opts = qemu_opts_create(&runtime_opts, NULL, 0, &error_abort);
qemu_opts_absorb_qdict(opts, options, &local_err); qemu_opts_absorb_qdict(opts, options, &local_err);
if (local_err) { if (local_err) {
......
...@@ -353,7 +353,7 @@ for opt do ...@@ -353,7 +353,7 @@ for opt do
;; ;;
--cpu=*) cpu="$optarg" --cpu=*) cpu="$optarg"
;; ;;
--extra-cflags=*) QEMU_CFLAGS="$optarg $QEMU_CFLAGS" --extra-cflags=*) QEMU_CFLAGS="$QEMU_CFLAGS $optarg"
EXTRA_CFLAGS="$optarg" EXTRA_CFLAGS="$optarg"
;; ;;
--extra-ldflags=*) LDFLAGS="$optarg $LDFLAGS" --extra-ldflags=*) LDFLAGS="$optarg $LDFLAGS"
......
...@@ -18,7 +18,6 @@ ...@@ -18,7 +18,6 @@
#include <unistd.h> #include <unistd.h>
#include <stdlib.h> #include <stdlib.h>
#include "config.h"
#include "qemu-common.h" #include "qemu-common.h"
#include "qemu/error-report.h" #include "qemu/error-report.h"
#include "sysemu/device_tree.h" #include "sysemu/device_tree.h"
......
...@@ -598,7 +598,7 @@ stored in its "value" member. In our example, the "value" member is a pointer ...@@ -598,7 +598,7 @@ stored in its "value" member. In our example, the "value" member is a pointer
to an TimerAlarmMethod instance. to an TimerAlarmMethod instance.
Notice that the "current" variable is used as "true" only in the first Notice that the "current" variable is used as "true" only in the first
interation of the loop. That's because the alarm timer method in use is the iteration of the loop. That's because the alarm timer method in use is the
first element of the alarm_timers array. Also notice that QAPI lists are handled first element of the alarm_timers array. Also notice that QAPI lists are handled
by hand and we return the head of the list. by hand and we return the head of the list.
......
...@@ -55,7 +55,7 @@ static void clipper_init(MachineState *machine) ...@@ -55,7 +55,7 @@ static void clipper_init(MachineState *machine)
ISABus *isa_bus; ISABus *isa_bus;
qemu_irq rtc_irq; qemu_irq rtc_irq;
long size, i; long size, i;
const char *palcode_filename; char *palcode_filename;
uint64_t palcode_entry, palcode_low, palcode_high; uint64_t palcode_entry, palcode_low, palcode_high;
uint64_t kernel_entry, kernel_low, kernel_high; uint64_t kernel_entry, kernel_low, kernel_high;
...@@ -101,8 +101,8 @@ static void clipper_init(MachineState *machine) ...@@ -101,8 +101,8 @@ static void clipper_init(MachineState *machine)
/* Load PALcode. Given that this is not "real" cpu palcode, /* Load PALcode. Given that this is not "real" cpu palcode,
but one explicitly written for the emulation, we might as but one explicitly written for the emulation, we might as
well load it directly from and ELF image. */ well load it directly from and ELF image. */
palcode_filename = (bios_name ? bios_name : "palcode-clipper"); palcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
palcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, palcode_filename); bios_name ? bios_name : "palcode-clipper");
if (palcode_filename == NULL) { if (palcode_filename == NULL) {
hw_error("no palcode provided\n"); hw_error("no palcode provided\n");
exit(1); exit(1);
...@@ -114,6 +114,7 @@ static void clipper_init(MachineState *machine) ...@@ -114,6 +114,7 @@ static void clipper_init(MachineState *machine)
hw_error("could not load palcode '%s'\n", palcode_filename); hw_error("could not load palcode '%s'\n", palcode_filename);
exit(1); exit(1);
} }
g_free(palcode_filename);
/* Start all cpus at the PALcode RESET entry point. */ /* Start all cpus at the PALcode RESET entry point. */
for (i = 0; i < smp_cpus; ++i) { for (i = 0; i < smp_cpus; ++i) {
......
...@@ -841,7 +841,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, ...@@ -841,7 +841,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
} }
} }
*p_rtc_irq = *qemu_allocate_irqs(typhoon_set_timer_irq, s, 1); *p_rtc_irq = qemu_allocate_irq(typhoon_set_timer_irq, s, 0);
/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB, /* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
but the address space hole reserved at this point is 8TB. */ but the address space hole reserved at this point is 8TB. */
...@@ -918,11 +918,11 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, ...@@ -918,11 +918,11 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* Init the ISA bus. */ /* Init the ISA bus. */
/* ??? Technically there should be a cy82c693ub pci-isa bridge. */ /* ??? Technically there should be a cy82c693ub pci-isa bridge. */
{ {
qemu_irq isa_pci_irq, *isa_irqs; qemu_irq *isa_irqs;
*isa_bus = isa_bus_new(NULL, get_system_memory(), &s->pchip.reg_io); *isa_bus = isa_bus_new(NULL, get_system_memory(), &s->pchip.reg_io);
isa_pci_irq = *qemu_allocate_irqs(typhoon_set_isa_irq, s, 1); isa_irqs = i8259_init(*isa_bus,
isa_irqs = i8259_init(*isa_bus, isa_pci_irq); qemu_allocate_irq(typhoon_set_isa_irq, s, 0));
isa_bus_irqs(*isa_bus, isa_irqs); isa_bus_irqs(*isa_bus, isa_irqs);
} }
......
...@@ -133,9 +133,8 @@ static void n800_mmc_cs_cb(void *opaque, int line, int level) ...@@ -133,9 +133,8 @@ static void n800_mmc_cs_cb(void *opaque, int line, int level)
static void n8x0_gpio_setup(struct n800_s *s) static void n8x0_gpio_setup(struct n800_s *s)
{ {
qemu_irq *mmc_cs = qemu_allocate_irqs(n800_mmc_cs_cb, s->mpu->mmc, 1); qdev_connect_gpio_out(s->mpu->gpio, N8X0_MMC_CS_GPIO,
qdev_connect_gpio_out(s->mpu->gpio, N8X0_MMC_CS_GPIO, mmc_cs[0]); qemu_allocate_irq(n800_mmc_cs_cb, s->mpu->mmc, 0));
qemu_irq_lower(qdev_get_gpio_in(s->mpu->gpio, N800_BAT_COVER_GPIO)); qemu_irq_lower(qdev_get_gpio_in(s->mpu->gpio, N800_BAT_COVER_GPIO));
} }
......
...@@ -103,7 +103,6 @@ static void sx1_init(MachineState *machine, const int version) ...@@ -103,7 +103,6 @@ static void sx1_init(MachineState *machine, const int version)
struct omap_mpu_state_s *mpu; struct omap_mpu_state_s *mpu;
MemoryRegion *address_space = get_system_memory(); MemoryRegion *address_space = get_system_memory();
MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *flash = g_new(MemoryRegion, 1);
MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
MemoryRegion *cs = g_new(MemoryRegion, 4); MemoryRegion *cs = g_new(MemoryRegion, 4);
static uint32_t cs0val = 0x00213090; static uint32_t cs0val = 0x00213090;
static uint32_t cs1val = 0x00215070; static uint32_t cs1val = 0x00215070;
...@@ -165,6 +164,7 @@ static void sx1_init(MachineState *machine, const int version) ...@@ -165,6 +164,7 @@ static void sx1_init(MachineState *machine, const int version)
if ((version == 1) && if ((version == 1) &&
(dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size, memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size,
&error_abort); &error_abort);
vmstate_register_ram_global(flash_1); vmstate_register_ram_global(flash_1);
......
...@@ -571,7 +571,7 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq) ...@@ -571,7 +571,7 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
s->irq = irq; s->irq = irq;
s->gpio_in = qemu_allocate_irqs(tc6393xb_gpio_set, s, TC6393XB_GPIOS); s->gpio_in = qemu_allocate_irqs(tc6393xb_gpio_set, s, TC6393XB_GPIOS);
s->l3v = *qemu_allocate_irqs(tc6393xb_l3v, s, 1); s->l3v = qemu_allocate_irq(tc6393xb_l3v, s, 0);
s->blanked = 1; s->blanked = 1;
s->sub_irqs = qemu_allocate_irqs(tc6393xb_sub_irq, s, TC6393XB_NR_IRQS); s->sub_irqs = qemu_allocate_irqs(tc6393xb_sub_irq, s, TC6393XB_NR_IRQS);
......
...@@ -596,6 +596,7 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus, ...@@ -596,6 +596,7 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
} }
} }
aml_append(parent_scope, method); aml_append(parent_scope, method);
qobject_decref(bsel);
} }
static void static void
......
...@@ -1352,9 +1352,9 @@ FWCfgState *pc_memory_init(MachineState *machine, ...@@ -1352,9 +1352,9 @@ FWCfgState *pc_memory_init(MachineState *machine,
return fw_cfg; return fw_cfg;
} }
qemu_irq *pc_allocate_cpu_irq(void) qemu_irq pc_allocate_cpu_irq(void)
{ {
return qemu_allocate_irqs(pic_irq_request, NULL, 1); return qemu_allocate_irq(pic_irq_request, NULL, 0);
} }
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus) DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus)
......
...@@ -86,10 +86,9 @@ static void pc_init1(MachineState *machine) ...@@ -86,10 +86,9 @@ static void pc_init1(MachineState *machine)
ISABus *isa_bus; ISABus *isa_bus;
PCII440FXState *i440fx_state; PCII440FXState *i440fx_state;
int piix3_devfn = -1; int piix3_devfn = -1;
qemu_irq *cpu_irq;
qemu_irq *gsi; qemu_irq *gsi;
qemu_irq *i8259; qemu_irq *i8259;
qemu_irq *smi_irq; qemu_irq smi_irq;
GSIState *gsi_state; GSIState *gsi_state;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BusState *idebus[MAX_IDE_BUS]; BusState *idebus[MAX_IDE_BUS];
...@@ -220,13 +219,13 @@ static void pc_init1(MachineState *machine) ...@@ -220,13 +219,13 @@ static void pc_init1(MachineState *machine)
} else if (xen_enabled()) { } else if (xen_enabled()) {
i8259 = xen_interrupt_controller_init(); i8259 = xen_interrupt_controller_init();
} else { } else {
cpu_irq = pc_allocate_cpu_irq(); i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
i8259 = i8259_init(isa_bus, cpu_irq[0]);
} }
for (i = 0; i < ISA_NUM_IRQS; i++) { for (i = 0; i < ISA_NUM_IRQS; i++) {
gsi_state->i8259_irq[i] = i8259[i]; gsi_state->i8259_irq[i] = i8259[i];
} }
g_free(i8259);
if (pci_enabled) { if (pci_enabled) {
ioapic_init_gsi(gsi_state, "i440fx"); ioapic_init_gsi(gsi_state, "i440fx");
} }
...@@ -284,10 +283,10 @@ static void pc_init1(MachineState *machine) ...@@ -284,10 +283,10 @@ static void pc_init1(MachineState *machine)
DeviceState *piix4_pm; DeviceState *piix4_pm;
I2CBus *smbus; I2CBus *smbus;
smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
/* TODO: Populate SPD eeprom data. */ /* TODO: Populate SPD eeprom data. */
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
gsi[9], *smi_irq, gsi[9], smi_irq,
kvm_enabled(), fw_cfg, &piix4_pm); kvm_enabled(), fw_cfg, &piix4_pm);
smbus_eeprom_init(smbus, 8, NULL, 0); smbus_eeprom_init(smbus, 8, NULL, 0);
......
...@@ -79,7 +79,6 @@ static void pc_q35_init(MachineState *machine) ...@@ -79,7 +79,6 @@ static void pc_q35_init(MachineState *machine)
GSIState *gsi_state; GSIState *gsi_state;
ISABus *isa_bus; ISABus *isa_bus;
int pci_enabled = 1; int pci_enabled = 1;
qemu_irq *cpu_irq;
qemu_irq *gsi; qemu_irq *gsi;
qemu_irq *i8259; qemu_irq *i8259;
int i; int i;
...@@ -230,8 +229,7 @@ static void pc_q35_init(MachineState *machine) ...@@ -230,8 +229,7 @@ static void pc_q35_init(MachineState *machine)
} else if (xen_enabled()) { } else if (xen_enabled()) {
i8259 = xen_interrupt_controller_init(); i8259 = xen_interrupt_controller_init();
} else { } else {
cpu_irq = pc_allocate_cpu_irq(); i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
i8259 = i8259_init(isa_bus, cpu_irq[0]);
} }
for (i = 0; i < ISA_NUM_IRQS; i++) { for (i = 0; i < ISA_NUM_IRQS; i++) {
......
...@@ -452,8 +452,6 @@ static const struct IDEDMAOps bmdma_ops = { ...@@ -452,8 +452,6 @@ static const struct IDEDMAOps bmdma_ops = {
void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d) void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d)
{ {
qemu_irq *irq;
if (bus->dma == &bm->dma) { if (bus->dma == &bm->dma) {
return; return;
} }
...@@ -461,8 +459,7 @@ void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d) ...@@ -461,8 +459,7 @@ void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d)
bm->dma.ops = &bmdma_ops; bm->dma.ops = &bmdma_ops;
bus->dma = &bm->dma; bus->dma = &bm->dma;
bm->irq = bus->irq; bm->irq = bus->irq;
irq = qemu_allocate_irqs(bmdma_irq, bm, 1); bus->irq = qemu_allocate_irq(bmdma_irq, bm, 0);
bus->irq = *irq;
bm->pci_dev = d; bm->pci_dev = d;
} }
......
...@@ -213,9 +213,6 @@ void exynos4210_init_board_irqs(Exynos4210Irq *s) ...@@ -213,9 +213,6 @@ void exynos4210_init_board_irqs(Exynos4210Irq *s)
uint32_t grp, bit, irq_id, n; uint32_t grp, bit, irq_id, n;
for (n = 0; n < EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ; n++) { for (n = 0; n < EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ; n++) {
s->board_irqs[n] = qemu_irq_split(s->int_combiner_irq[n],
s->ext_combiner_irq[n]);
irq_id = 0; irq_id = 0;
if (n == EXYNOS4210_COMBINER_GET_IRQ_NUM(1, 4) || if (n == EXYNOS4210_COMBINER_GET_IRQ_NUM(1, 4) ||
n == EXYNOS4210_COMBINER_GET_IRQ_NUM(12, 4)) { n == EXYNOS4210_COMBINER_GET_IRQ_NUM(12, 4)) {
...@@ -230,8 +227,10 @@ void exynos4210_init_board_irqs(Exynos4210Irq *s) ...@@ -230,8 +227,10 @@ void exynos4210_init_board_irqs(Exynos4210Irq *s)
if (irq_id) { if (irq_id) {
s->board_irqs[n] = qemu_irq_split(s->int_combiner_irq[n], s->board_irqs[n] = qemu_irq_split(s->int_combiner_irq[n],
s->ext_gic_irq[irq_id-32]); s->ext_gic_irq[irq_id-32]);
} else {
s->board_irqs[n] = qemu_irq_split(s->int_combiner_irq[n],
s->ext_combiner_irq[n]);
} }
} }
for (; n < EXYNOS4210_MAX_INT_COMBINER_IN_IRQ; n++) { for (; n < EXYNOS4210_MAX_INT_COMBINER_IN_IRQ; n++) {
/* these IDs are passed to Internal Combiner and External GIC */ /* these IDs are passed to Internal Combiner and External GIC */
......
...@@ -65,7 +65,6 @@ static void i82378_realize(PCIDevice *pci, Error **errp) ...@@ -65,7 +65,6 @@ static void i82378_realize(PCIDevice *pci, Error **errp)
uint8_t *pci_conf; uint8_t *pci_conf;
ISABus *isabus; ISABus *isabus;
ISADevice *isa; ISADevice *isa;
qemu_irq *out0_irq;
pci_conf = pci->config; pci_conf = pci->config;
pci_set_word(pci_conf + PCI_COMMAND, pci_set_word(pci_conf + PCI_COMMAND,
...@@ -88,11 +87,9 @@ static void i82378_realize(PCIDevice *pci, Error **errp) ...@@ -88,11 +87,9 @@ static void i82378_realize(PCIDevice *pci, Error **errp)
All devices accept byte access only, except timer All devices accept byte access only, except timer
*/ */
/* Workaround the fact that i8259 is not qdev'ified... */
out0_irq = qemu_allocate_irqs(i82378_request_out0_irq, s, 1);
/* 2 82C59 (irq) */ /* 2 82C59 (irq) */
s->i8259 = i8259_init(isabus, *out0_irq); s->i8259 = i8259_init(isabus,
qemu_allocate_irq(i82378_request_out0_irq, s, 0));
isa_bus_irqs(isabus, s->i8259); isa_bus_irqs(isabus, s->i8259);
/* 1 82C54 (pit) */ /* 1 82C54 (pit) */
......
...@@ -360,11 +360,8 @@ static void ich9_set_sci(void *opaque, int irq_num, int level) ...@@ -360,11 +360,8 @@ static void ich9_set_sci(void *opaque, int irq_num, int level)
void ich9_lpc_pm_init(PCIDevice *lpc_pci) void ich9_lpc_pm_init(PCIDevice *lpc_pci)
{ {
ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pci); ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pci);
qemu_irq *sci_irq;
sci_irq = qemu_allocate_irqs(ich9_set_sci, lpc, 1);
ich9_pm_init(lpc_pci, &lpc->pm, sci_irq[0]);
ich9_pm_init(lpc_pci, &lpc->pm, qemu_allocate_irq(ich9_set_sci, lpc, 0));
ich9_lpc_reset(&lpc->d.qdev); ich9_lpc_reset(&lpc->d.qdev);
} }
......
...@@ -78,7 +78,7 @@ static void lm32_evr_init(MachineState *machine) ...@@ -78,7 +78,7 @@ static void lm32_evr_init(MachineState *machine)
DriveInfo *dinfo; DriveInfo *dinfo;
MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *phys_ram = g_new(MemoryRegion, 1); MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
qemu_irq *cpu_irq, irq[32]; qemu_irq irq[32];
ResetInfo *reset_info; ResetInfo *reset_info;
int i; int i;
...@@ -123,8 +123,7 @@ static void lm32_evr_init(MachineState *machine) ...@@ -123,8 +123,7 @@ static void lm32_evr_init(MachineState *machine)
1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
/* create irq lines */ /* create irq lines */
cpu_irq = qemu_allocate_irqs(cpu_irq_handler, cpu, 1); env->pic_state = lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, cpu, 0));
env->pic_state = lm32_pic_init(*cpu_irq);
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
irq[i] = qdev_get_gpio_in(env->pic_state, i); irq[i] = qdev_get_gpio_in(env->pic_state, i);
} }
...@@ -173,7 +172,7 @@ static void lm32_uclinux_init(MachineState *machine) ...@@ -173,7 +172,7 @@ static void lm32_uclinux_init(MachineState *machine)
DriveInfo *dinfo; DriveInfo *dinfo;
MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *phys_ram = g_new(MemoryRegion, 1); MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
qemu_irq *cpu_irq, irq[32]; qemu_irq irq[32];
HWSetup *hw; HWSetup *hw;
ResetInfo *reset_info; ResetInfo *reset_info;
int i; int i;
...@@ -225,8 +224,7 @@ static void lm32_uclinux_init(MachineState *machine) ...@@ -225,8 +224,7 @@ static void lm32_uclinux_init(MachineState *machine)
1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
/* create irq lines */ /* create irq lines */
cpu_irq = qemu_allocate_irqs(cpu_irq_handler, env, 1); env->pic_state = lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, env, 0));
env->pic_state = lm32_pic_init(*cpu_irq);
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
irq[i] = qdev_get_gpio_in(env->pic_state, i); irq[i] = qdev_get_gpio_in(env->pic_state, i);
} }
......
...@@ -86,7 +86,7 @@ milkymist_init(MachineState *machine) ...@@ -86,7 +86,7 @@ milkymist_init(MachineState *machine)
DriveInfo *dinfo; DriveInfo *dinfo;
MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *phys_sdram = g_new(MemoryRegion, 1); MemoryRegion *phys_sdram = g_new(MemoryRegion, 1);
qemu_irq irq[32], *cpu_irq; qemu_irq irq[32];
int i; int i;
char *bios_filename; char *bios_filename;
ResetInfo *reset_info; ResetInfo *reset_info;
...@@ -130,8 +130,7 @@ milkymist_init(MachineState *machine) ...@@ -130,8 +130,7 @@ milkymist_init(MachineState *machine)
2, 0x00, 0x89, 0x00, 0x1d, 1); 2, 0x00, 0x89, 0x00, 0x1d, 1);
/* create irq lines */ /* create irq lines */
cpu_irq = qemu_allocate_irqs(cpu_irq_handler, cpu, 1); env->pic_state = lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, cpu, 0));
env->pic_state = lm32_pic_init(*cpu_irq);
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
irq[i] = qdev_get_gpio_in(env->pic_state, i); irq[i] = qdev_get_gpio_in(env->pic_state, i);
} }
......
...@@ -155,7 +155,7 @@ ...@@ -155,7 +155,7 @@
#define GEM_NWCFG_BCAST_REJ 0x00000020 /* Reject broadcast packets */ #define GEM_NWCFG_BCAST_REJ 0x00000020 /* Reject broadcast packets */
#define GEM_NWCFG_PROMISC 0x00000010 /* Accept all packets */ #define GEM_NWCFG_PROMISC 0x00000010 /* Accept all packets */
#define GEM_DMACFG_RBUFSZ_M 0x007F0000 /* DMA RX Buffer Size mask */ #define GEM_DMACFG_RBUFSZ_M 0x00FF0000 /* DMA RX Buffer Size mask */
#define GEM_DMACFG_RBUFSZ_S 16 /* DMA RX Buffer Size shift */ #define GEM_DMACFG_RBUFSZ_S 16 /* DMA RX Buffer Size shift */
#define GEM_DMACFG_RBUFSZ_MUL 64 /* DMA RX Buffer Size multiplier */ #define GEM_DMACFG_RBUFSZ_MUL 64 /* DMA RX Buffer Size multiplier */
#define GEM_DMACFG_TXCSUM_OFFL 0x00000800 /* Transmit checksum offload */ #define GEM_DMACFG_TXCSUM_OFFL 0x00000800 /* Transmit checksum offload */
......
...@@ -1030,6 +1030,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) ...@@ -1030,6 +1030,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
exit(1); exit(1);
} }
} }
g_free(filename);
/* Reserve space for dtb */ /* Reserve space for dtb */
dt_base = (loadaddr + bios_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK; dt_base = (loadaddr + bios_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK;
......
...@@ -528,7 +528,6 @@ static void ppc_prep_init(MachineState *machine) ...@@ -528,7 +528,6 @@ static void ppc_prep_init(MachineState *machine)
PCIDevice *pci; PCIDevice *pci;
ISABus *isa_bus; ISABus *isa_bus;
ISADevice *isa; ISADevice *isa;
qemu_irq *cpu_exit_irq;
int ppc_boot_device; int ppc_boot_device;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
...@@ -625,11 +624,11 @@ static void ppc_prep_init(MachineState *machine) ...@@ -625,11 +624,11 @@ static void ppc_prep_init(MachineState *machine)
/* PCI -> ISA bridge */ /* PCI -> ISA bridge */
pci = pci_create_simple(pci_bus, PCI_DEVFN(1, 0), "i82378"); pci = pci_create_simple(pci_bus, PCI_DEVFN(1, 0), "i82378");
cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
cpu = POWERPC_CPU(first_cpu); cpu = POWERPC_CPU(first_cpu);
qdev_connect_gpio_out(&pci->qdev, 0, qdev_connect_gpio_out(&pci->qdev, 0,
cpu->env.irq_inputs[PPC6xx_INPUT_INT]); cpu->env.irq_inputs[PPC6xx_INPUT_INT]);
qdev_connect_gpio_out(&pci->qdev, 1, *cpu_exit_irq); qdev_connect_gpio_out(&pci->qdev, 1,
qemu_allocate_irq(cpu_request_exit, NULL, 0));
sysbus_connect_irq(&pcihost->busdev, 0, qdev_get_gpio_in(&pci->qdev, 9)); sysbus_connect_irq(&pcihost->busdev, 0, qdev_get_gpio_in(&pci->qdev, 9));
sysbus_connect_irq(&pcihost->busdev, 1, qdev_get_gpio_in(&pci->qdev, 11)); sysbus_connect_irq(&pcihost->busdev, 1, qdev_get_gpio_in(&pci->qdev, 11));
sysbus_connect_irq(&pcihost->busdev, 2, qdev_get_gpio_in(&pci->qdev, 9)); sysbus_connect_irq(&pcihost->busdev, 2, qdev_get_gpio_in(&pci->qdev, 9));
......
...@@ -897,7 +897,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ...@@ -897,7 +897,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
espdma_irq, ledma_irq; espdma_irq, ledma_irq;
qemu_irq esp_reset, dma_enable; qemu_irq esp_reset, dma_enable;
qemu_irq fdc_tc; qemu_irq fdc_tc;
qemu_irq *cpu_halt;
unsigned long kernel_size; unsigned long kernel_size;
DriveInfo *fd[MAX_FD]; DriveInfo *fd[MAX_FD];
FWCfgState *fw_cfg; FWCfgState *fw_cfg;
...@@ -1024,9 +1023,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ...@@ -1024,9 +1023,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
escc_init(hwdef->serial_base, slavio_irq[15], slavio_irq[15], escc_init(hwdef->serial_base, slavio_irq[15], slavio_irq[15],
serial_hds[0], serial_hds[1], ESCC_CLOCK, 1); serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
cpu_halt = qemu_allocate_irqs(cpu_halt_signal, NULL, 1);
if (hwdef->apc_base) { if (hwdef->apc_base) {
apc_init(hwdef->apc_base, cpu_halt[0]); apc_init(hwdef->apc_base, qemu_allocate_irq(cpu_halt_signal, NULL, 0));
} }
if (hwdef->fd_base) { if (hwdef->fd_base) {
...@@ -1036,7 +1034,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ...@@ -1036,7 +1034,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
sun4m_fdctrl_init(slavio_irq[22], hwdef->fd_base, fd, sun4m_fdctrl_init(slavio_irq[22], hwdef->fd_base, fd,
&fdc_tc); &fdc_tc);
} else { } else {
fdc_tc = *qemu_allocate_irqs(dummy_fdc_tc, NULL, 1); fdc_tc = qemu_allocate_irq(dummy_fdc_tc, NULL, 0);
} }
slavio_misc_init(hwdef->slavio_base, hwdef->aux1_base, hwdef->aux2_base, slavio_misc_init(hwdef->slavio_base, hwdef->aux1_base, hwdef->aux2_base,
......
...@@ -280,14 +280,12 @@ static int sp804_init(SysBusDevice *sbd) ...@@ -280,14 +280,12 @@ static int sp804_init(SysBusDevice *sbd)
{ {
DeviceState *dev = DEVICE(sbd); DeviceState *dev = DEVICE(sbd);
SP804State *s = SP804(dev); SP804State *s = SP804(dev);
qemu_irq *qi;
qi = qemu_allocate_irqs(sp804_set_irq, s, 2);
sysbus_init_irq(sbd, &s->irq); sysbus_init_irq(sbd, &s->irq);
s->timer[0] = arm_timer_init(s->freq0); s->timer[0] = arm_timer_init(s->freq0);
s->timer[1] = arm_timer_init(s->freq1); s->timer[1] = arm_timer_init(s->freq1);
s->timer[0]->irq = qi[0]; s->timer[0]->irq = qemu_allocate_irq(sp804_set_irq, s, 0);
s->timer[1]->irq = qi[1]; s->timer[1]->irq = qemu_allocate_irq(sp804_set_irq, s, 1);
memory_region_init_io(&s->iomem, OBJECT(s), &sp804_ops, s, memory_region_init_io(&s->iomem, OBJECT(s), &sp804_ops, s,
"sp804", 0x1000); "sp804", 0x1000);
sysbus_init_mmio(sbd, &s->iomem); sysbus_init_mmio(sbd, &s->iomem);
......
...@@ -40,15 +40,15 @@ static void puv3_intc_cpu_handler(void *opaque, int irq, int level) ...@@ -40,15 +40,15 @@ static void puv3_intc_cpu_handler(void *opaque, int irq, int level)
static void puv3_soc_init(CPUUniCore32State *env) static void puv3_soc_init(CPUUniCore32State *env)
{ {
qemu_irq *cpu_intc, irqs[PUV3_IRQS_NR]; qemu_irq cpu_intc, irqs[PUV3_IRQS_NR];
DeviceState *dev; DeviceState *dev;
MemoryRegion *i8042 = g_new(MemoryRegion, 1); MemoryRegion *i8042 = g_new(MemoryRegion, 1);
int i; int i;
/* Initialize interrupt controller */ /* Initialize interrupt controller */
cpu_intc = qemu_allocate_irqs(puv3_intc_cpu_handler, cpu_intc = qemu_allocate_irq(puv3_intc_cpu_handler,
uc32_env_get_cpu(env), 1); uc32_env_get_cpu(env), 0);
dev = sysbus_create_simple("puv3_intc", PUV3_INTC_BASE, *cpu_intc); dev = sysbus_create_simple("puv3_intc", PUV3_INTC_BASE, cpu_intc);
for (i = 0; i < PUV3_IRQS_NR; i++) { for (i = 0; i < PUV3_IRQS_NR; i++) {
irqs[i] = qdev_get_gpio_in(dev, i); irqs[i] = qdev_get_gpio_in(dev, i);
} }
......
...@@ -193,7 +193,7 @@ FWCfgState *pc_memory_init(MachineState *machine, ...@@ -193,7 +193,7 @@ FWCfgState *pc_memory_init(MachineState *machine,
MemoryRegion *rom_memory, MemoryRegion *rom_memory,
MemoryRegion **ram_memory, MemoryRegion **ram_memory,
PcGuestInfo *guest_info); PcGuestInfo *guest_info);
qemu_irq *pc_allocate_cpu_irq(void); qemu_irq pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
ISADevice **rtc_state, ISADevice **rtc_state,
......
...@@ -481,7 +481,6 @@ static void slirp_smb_cleanup(SlirpState *s) ...@@ -481,7 +481,6 @@ static void slirp_smb_cleanup(SlirpState *s)
static int slirp_smb(SlirpState* s, const char *exported_dir, static int slirp_smb(SlirpState* s, const char *exported_dir,
struct in_addr vserver_addr) struct in_addr vserver_addr)
{ {
static int instance;
char smb_conf[128]; char smb_conf[128];
char smb_cmdline[128]; char smb_cmdline[128];
struct passwd *passwd; struct passwd *passwd;
...@@ -505,10 +504,10 @@ static int slirp_smb(SlirpState* s, const char *exported_dir, ...@@ -505,10 +504,10 @@ static int slirp_smb(SlirpState* s, const char *exported_dir,
return -1; return -1;
} }
snprintf(s->smb_dir, sizeof(s->smb_dir), "/tmp/qemu-smb.%ld-%d", snprintf(s->smb_dir, sizeof(s->smb_dir), "/tmp/qemu-smb.XXXXXX");
(long)getpid(), instance++); if (!mkdtemp(s->smb_dir)) {
if (mkdir(s->smb_dir, 0700) < 0) {
error_report("could not create samba server dir '%s'", s->smb_dir); error_report("could not create samba server dir '%s'", s->smb_dir);
s->smb_dir[0] = 0;
return -1; return -1;
} }
snprintf(smb_conf, sizeof(smb_conf), "%s/%s", s->smb_dir, "smb.conf"); snprintf(smb_conf, sizeof(smb_conf), "%s/%s", s->smb_dir, "smb.conf");
......
...@@ -3239,7 +3239,9 @@ DEF("incoming", HAS_ARG, QEMU_OPTION_incoming, \ ...@@ -3239,7 +3239,9 @@ DEF("incoming", HAS_ARG, QEMU_OPTION_incoming, \
"-incoming fd:fd\n" \ "-incoming fd:fd\n" \
"-incoming exec:cmdline\n" \ "-incoming exec:cmdline\n" \
" accept incoming migration on given file descriptor\n" \ " accept incoming migration on given file descriptor\n" \
" or from given external command\n", " or from given external command\n" \
"-incoming defer\n" \
" wait for the URI to be specified via migrate_incoming\n",
QEMU_ARCH_ALL) QEMU_ARCH_ALL)
STEXI STEXI
@item -incoming tcp:[@var{host}]:@var{port}[,to=@var{maxport}][,ipv4][,ipv6] @item -incoming tcp:[@var{host}]:@var{port}[,to=@var{maxport}][,ipv4][,ipv6]
...@@ -3255,6 +3257,11 @@ Accept incoming migration from a given filedescriptor. ...@@ -3255,6 +3257,11 @@ Accept incoming migration from a given filedescriptor.
@item -incoming exec:@var{cmdline} @item -incoming exec:@var{cmdline}
Accept incoming migration as an output from specified external command. Accept incoming migration as an output from specified external command.
@item -incoming defer
Wait for the URI to be specified via migrate_incoming. The monitor can
be used to change settings (such as migration parameters) prior to issuing
the migrate_incoming to allow the migration to begin.
ETEXI ETEXI
DEF("nodefaults", 0, QEMU_OPTION_nodefaults, \ DEF("nodefaults", 0, QEMU_OPTION_nodefaults, \
......
...@@ -285,7 +285,6 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, ...@@ -285,7 +285,6 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo,
/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */ /* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
#define TARGET_PAGE_BITS 12 #define TARGET_PAGE_BITS 12
#define MMAP_SHIFT TARGET_PAGE_BITS
#define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32
......
...@@ -21,7 +21,6 @@ ...@@ -21,7 +21,6 @@
/* translate-all.c */ /* translate-all.c */
void tb_invalidate_phys_page_fast(tb_page_addr_t start, int len); void tb_invalidate_phys_page_fast(tb_page_addr_t start, int len);
void cpu_unlink_tb(CPUState *cpu);
void tb_check_watchpoint(CPUState *cpu); void tb_check_watchpoint(CPUState *cpu);
#endif /* TRANSLATE_ALL_H */ #endif /* TRANSLATE_ALL_H */
...@@ -44,6 +44,12 @@ QemuOptsList socket_optslist = { ...@@ -44,6 +44,12 @@ QemuOptsList socket_optslist = {
},{ },{
.name = "port", .name = "port",
.type = QEMU_OPT_STRING, .type = QEMU_OPT_STRING,
},{
.name = "localaddr",
.type = QEMU_OPT_STRING,
},{
.name = "localport",
.type = QEMU_OPT_STRING,
},{ },{
.name = "to", .name = "to",
.type = QEMU_OPT_NUMBER, .type = QEMU_OPT_NUMBER,
......
...@@ -4312,8 +4312,9 @@ int main(int argc, char **argv, char **envp) ...@@ -4312,8 +4312,9 @@ int main(int argc, char **argv, char **envp)
/* init remote displays */ /* init remote displays */
qemu_opts_foreach(qemu_find_opts("vnc"), vnc_init_func, NULL, 0); qemu_opts_foreach(qemu_find_opts("vnc"), vnc_init_func, NULL, 0);
if (show_vnc_port) { if (show_vnc_port) {
printf("VNC server running on `%s'\n", char *ret = vnc_display_local_addr("default");
vnc_display_local_addr("default")); printf("VNC server running on `%s'\n", ret);
g_free(ret);
} }
#endif #endif
#ifdef CONFIG_SPICE #ifdef CONFIG_SPICE
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册