提交 19e0fefa 编写于 作者: F Fabian Aggeler 提交者: Peter Maydell

target-arm: add arm_is_secure() function

arm_is_secure() function allows to determine CPU security state
if the CPU implements Security Extensions/EL3.
arm_is_secure_below_el3() returns true if CPU is in secure state
below EL3.
Signed-off-by: NSergey Fedorov <s.fedorov@samsung.com>
Signed-off-by: NFabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: NGreg Bellows <greg.bellows@linaro.org>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Message-id: 1413910544-20150-3-git-send-email-greg.bellows@linaro.org
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
上级 0b7d409d
master openEuler-20.03-LTS openEuler-20.09 openEuler-RISCV stable-2.10 stable-2.11 stable-2.12 stable-2.2 stable-2.3 stable-2.4 stable-2.5 stable-2.6 stable-2.7 stable-2.8 stable-2.9 stable-3.0 stable-3.1 stable-4.0 stable-4.1 stable-4.2 v5.1.0-rc2 v5.1.0-rc1 v5.1.0-rc0 v5.0.0 v5.0.0-rc4 v5.0.0-rc3 v5.0.0-rc2 v5.0.0-rc1 v5.0.0-rc0 v4.2.1 v4.2.0 v4.2.0-rc5 v4.2.0-rc4 v4.2.0-rc3 v4.2.0-rc2 v4.2.0-rc1 v4.2.0-rc0 v4.1.1 v4.1.0 v4.1.0-rc5 v4.1.0-rc4 v4.1.0-rc3 v4.1.0-rc2 v4.1.0-rc1 v4.1.0-rc0 v4.0.1 v4.0.0 v4.0.0-rc4 v4.0.0-rc3 v4.0.0-rc2 v4.0.0-rc1 v4.0.0-rc0 v3.1.1.1 v3.1.1 v3.1.0 v3.1.0-rc5 v3.1.0-rc4 v3.1.0-rc3 v3.1.0-rc2 v3.1.0-rc1 v3.1.0-rc0 v3.0.1 v3.0.0 v3.0.0-rc4 v3.0.0-rc3 v3.0.0-rc2 v3.0.0-rc1 v3.0.0-rc0 v2.12.1 v2.12.0 v2.12.0-rc4 v2.12.0-rc3 v2.12.0-rc2 v2.12.0-rc1 v2.12.0-rc0 v2.11.2 v2.11.1 v2.11.0 v2.11.0-rc5 v2.11.0-rc4 v2.11.0-rc3 v2.11.0-rc2 v2.11.0-rc1 v2.11.0-rc0 v2.10.2 v2.10.1 v2.10.0 v2.10.0-rc4 v2.10.0-rc3 v2.10.0-rc2 v2.10.0-rc1 v2.10.0-rc0 v2.9.1 v2.9.0 v2.9.0-rc5 v2.9.0-rc4 v2.9.0-rc3 v2.9.0-rc2 v2.9.0-rc1 v2.9.0-rc0 v2.8.1.1 v2.8.1 v2.8.0 v2.8.0-rc4 v2.8.0-rc3 v2.8.0-rc2 v2.8.0-rc1 v2.8.0-rc0 v2.7.1 v2.7.0 v2.7.0-rc5 v2.7.0-rc4 v2.7.0-rc3 v2.7.0-rc2 v2.7.0-rc1 v2.7.0-rc0 v2.6.2 v2.6.1 v2.6.0 v2.6.0-rc5 v2.6.0-rc4 v2.6.0-rc3 v2.6.0-rc2 v2.6.0-rc1 v2.6.0-rc0 v2.5.1.1 v2.5.1 v2.5.0 v2.5.0-rc4 v2.5.0-rc3 v2.5.0-rc2 v2.5.0-rc1 v2.5.0-rc0 v2.4.1 v2.4.0.1 v2.4.0 v2.4.0-rc4 v2.4.0-rc3 v2.4.0-rc2 v2.4.0-rc1 v2.4.0-rc0 v2.3.1 v2.3.0 v2.3.0-rc4 v2.3.0-rc3 v2.3.0-rc2 v2.3.0-rc1 v2.3.0-rc0 v2.2.1 v2.2.0 v2.2.0-rc5 v2.2.0-rc4 v2.2.0-rc3 v2.2.0-rc2 v2.2.0-rc1 v2.2.0-rc0
无相关合并请求
......@@ -753,6 +753,53 @@ static inline int arm_feature(CPUARMState *env, int feature)
return (env->features & (1ULL << feature)) != 0;
}
#if !defined(CONFIG_USER_ONLY)
/* Return true if exception levels below EL3 are in secure state,
* or would be following an exception return to that level.
* Unlike arm_is_secure() (which is always a question about the
* _current_ state of the CPU) this doesn't care about the current
* EL or mode.
*/
static inline bool arm_is_secure_below_el3(CPUARMState *env)
{
if (arm_feature(env, ARM_FEATURE_EL3)) {
return !(env->cp15.scr_el3 & SCR_NS);
} else {
/* If EL2 is not supported then the secure state is implementation
* defined, in which case QEMU defaults to non-secure.
*/
return false;
}
}
/* Return true if the processor is in secure state */
static inline bool arm_is_secure(CPUARMState *env)
{
if (arm_feature(env, ARM_FEATURE_EL3)) {
if (is_a64(env) && extract32(env->pstate, 2, 2) == 3) {
/* CPU currently in AArch64 state and EL3 */
return true;
} else if (!is_a64(env) &&
(env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) {
/* CPU currently in AArch32 state and monitor mode */
return true;
}
}
return arm_is_secure_below_el3(env);
}
#else
static inline bool arm_is_secure_below_el3(CPUARMState *env)
{
return false;
}
static inline bool arm_is_secure(CPUARMState *env)
{
return false;
}
#endif
/* Return true if the specified exception level is running in AArch64 state. */
static inline bool arm_el_is_aa64(CPUARMState *env, int el)
{
......
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