提交 1931e260 编写于 作者: T ths

Check the Galilleo config register instead of hardcoding the endianness.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3417 c046a42c-6fe2-441c-8c8c-71466251a162
上级 647de6ca
......@@ -306,9 +306,8 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr,
GT64120State *s = opaque;
uint32_t saddr;
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
if (!(s->regs[GT_PCI0_CMD] & 1))
val = bswap32(val);
saddr = (addr & 0xfff) >> 2;
switch (saddr) {
......@@ -528,8 +527,7 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr,
s->pci->config_reg = val & 0x80fffffc;
break;
case GT_PCI0_CFGDATA:
if (s->pci->config_reg & (1u << 31))
pci_host_data_writel(s->pci, 0, val);
pci_host_data_writel(s->pci, 0, val);
break;
/* Interrupts */
......@@ -585,9 +583,7 @@ static uint32_t gt64120_readl (void *opaque,
uint32_t val;
uint32_t saddr;
val = 0;
saddr = (addr & 0xfff) >> 2;
switch (saddr) {
/* CPU Configuration */
......@@ -768,10 +764,7 @@ static uint32_t gt64120_readl (void *opaque,
val = s->pci->config_reg;
break;
case GT_PCI0_CFGDATA:
if (!(s->pci->config_reg & (1u << 31)))
val = 0xffffffff;
else
val = pci_host_data_readl(s->pci, 0);
val = pci_host_data_readl(s->pci, 0);
break;
case GT_PCI0_CMD:
......@@ -844,9 +837,9 @@ static uint32_t gt64120_readl (void *opaque,
break;
}
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
if (!(s->regs[GT_PCI0_CMD] & 1))
val = bswap32(val);
return val;
}
......@@ -1083,19 +1076,12 @@ void gt64120_reset(void *opaque)
static uint32_t gt64120_read_config(PCIDevice *d, uint32_t address, int len)
{
uint32_t val = pci_default_read_config(d, address, len);
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
return val;
return pci_default_read_config(d, address, len);
}
static void gt64120_write_config(PCIDevice *d, uint32_t address, uint32_t val,
int len)
{
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
pci_default_write_config(d, address, val, len);
}
......
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