Implement iwMMXt instruction set for the PXA270 cpu.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2752 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/cpu.h

@@ -129,6 +129,14 @@ typedef struct CPUARMState {
         float_status fp_status;
     } vfp;
 
+    /* iwMMXt coprocessor state.  */
+    struct {
+        uint64_t regs[16];
+        uint64_t val;
+
+        uint32_t cregs[16];
+    } iwmmxt;
+
 #if defined(CONFIG_USER_ONLY)
     /* For usermode syscall translation.  */
     int eabi;
@@ -218,10 +226,21 @@ enum arm_cpu_mode {
 #define ARM_VFP_FPINST  9
 #define ARM_VFP_FPINST2 10
 
+/* iwMMXt coprocessor control registers.  */
+#define ARM_IWMMXT_wCID		0
+#define ARM_IWMMXT_wCon		1
+#define ARM_IWMMXT_wCSSF	2
+#define ARM_IWMMXT_wCASF	3
+#define ARM_IWMMXT_wCGR0	8
+#define ARM_IWMMXT_wCGR1	9
+#define ARM_IWMMXT_wCGR2	10
+#define ARM_IWMMXT_wCGR3	11
+
 enum arm_features {
     ARM_FEATURE_VFP,
     ARM_FEATURE_AUXCR,  /* ARM1026 Auxiliary control register.  */
     ARM_FEATURE_XSCALE, /* Intel XScale extensions.  */
+    ARM_FEATURE_IWMMXT  /* Intel iwMMXt extension.  */
 };
 
 static inline int arm_feature(CPUARMState *env, int feature)

target-arm/exec.h

@@ -32,6 +32,8 @@ register uint32_t T2 asm(AREG3);
 #define FT0d env->vfp.tmp0d
 #define FT1d env->vfp.tmp1d
 
+#define M0   env->iwmmxt.val
+
 #include "cpu.h"
 #include "exec-all.h"
 

target-arm/helper.c

@@ -42,6 +42,8 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
     case ARM_CPUID_PXA270_C5:
         set_feature(env, ARM_FEATURE_XSCALE);
         /* JTAG_ID is ((id << 28) | 0x09265013) */
+        set_feature(env, ARM_FEATURE_IWMMXT);
+        env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
         env->cp15.c0_cachetype = 0xd172172;
         break;
     default:

target-arm/op.c

@@ -1213,3 +1213,6 @@ void OPPROTO op_movl_T0_T2(void)
 {
     T0 = T2;
 }
+
+/* iwMMXt support */
+#include "op_iwmmxt.c"

target-arm/op_mem.h

@@ -67,4 +67,24 @@ VFP_MEM_OP(d,q)
 
 #undef VFP_MEM_OP
 
+/* iwMMXt load/store.  Address is in T1 */
+#define MMX_MEM_OP(name, ldname) \
+void OPPROTO glue(op_iwmmxt_ld##name,MEMSUFFIX)(void) \
+{ \
+    M0 = glue(ld##ldname,MEMSUFFIX)(T1); \
+    FORCE_RET(); \
+} \
+void OPPROTO glue(op_iwmmxt_st##name,MEMSUFFIX)(void) \
+{ \
+    glue(st##name,MEMSUFFIX)(T1, M0); \
+    FORCE_RET(); \
+}
+
+MMX_MEM_OP(b, ub)
+MMX_MEM_OP(w, uw)
+MMX_MEM_OP(l, l)
+MMX_MEM_OP(q, q)
+
+#undef MMX_MEM_OP
+
 #undef MEMSUFFIX

tests/Makefile

@@ -82,6 +82,9 @@ hello-arm: hello-arm.o
 hello-arm.o: hello-arm.c
 	arm-linux-gcc -Wall -g -O2 -c -o $@ $<
 
+test-arm-iwmmxt: test-arm-iwmmxt.s
+	cpp < $< | arm-linux-gnu-gcc -Wall -static -march=iwmmxt -mabi=aapcs -x assembler - -o $@
+
 # MIPS test
 hello-mips: hello-mips.c
 	mips-linux-gnu-gcc -nostdlib -static -mno-abicalls -fno-PIC -mabi=32 -Wall -Wextra -g -O2 -o $@ $<

tests/test-arm-iwmmxt.s

+@ Checks whether iwMMXt is functional.
+.code	32
+.globl	main
+
+main:
+ldr	r0, =data0
+ldr	r1, =data1
+ldr	r2, =data2
+#ifndef FPA
+wldrd	wr0, [r0, #0]
+wldrd	wr1, [r0, #8]
+wldrd	wr2, [r1, #0]
+wldrd	wr3, [r1, #8]
+wsubb	wr2, wr2, wr0
+wsubb	wr3, wr3, wr1
+wldrd	wr0, [r2, #0]
+wldrd	wr1, [r2, #8]
+waddb	wr0, wr0, wr2
+waddb	wr1, wr1, wr3
+wstrd	wr0, [r2, #0]
+wstrd	wr1, [r2, #8]
+#else
+ldfe	f0, [r0, #0]
+ldfe	f1, [r0, #8]
+ldfe	f2, [r1, #0]
+ldfe	f3, [r1, #8]
+adfdp	f2, f2, f0
+adfdp	f3, f3, f1
+ldfe	f0, [r2, #0]
+ldfe	f1, [r2, #8]
+adfd	f0, f0, f2
+adfd	f1, f1, f3
+stfe	f0, [r2, #0]
+stfe	f1, [r2, #8]
+#endif
+mov	r0, #1
+mov	r1, r2
+mov	r2, #0x11
+swi	#0x900004
+mov	r0, #0
+swi	#0x900001
+
+.data
+data0:
+.string	"aaaabbbbccccdddd"
+data1:
+.string	"bbbbccccddddeeee"
+data2:
+.string	"hvLLWs\x1fsdrs9\x1fNJ-\n"