提交 1479073b 编写于 作者: M Max Filippov

target-xtensa: fix gdb register map construction

Due to different gdb overlay organization between windowed/call0
configurations core import script doesn't always work correctly.
Simplify the script: always copy complete gdb register map from overlay,
count registers at core registerstion time. Update existing cores.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
上级 ddd44279
......@@ -33,7 +33,7 @@
#include "core-dc232b/core-isa.h"
#include "overlay_tool.h"
static const XtensaConfig dc232b __attribute__((unused)) = {
static XtensaConfig dc232b __attribute__((unused)) = {
.name = "dc232b",
.gdb_regmap = {
.num_regs = 120,
......
......@@ -34,7 +34,7 @@
#include "core-dc233c/core-isa.h"
#include "overlay_tool.h"
static const XtensaConfig dc233c __attribute__((unused)) = {
static XtensaConfig dc233c __attribute__((unused)) = {
.name = "dc233c",
.gdb_regmap = {
.num_regs = 121,
......
......@@ -33,9 +33,14 @@
#include "core-fsf/core-isa.h"
#include "overlay_tool.h"
static const XtensaConfig fsf __attribute__((unused)) = {
static XtensaConfig fsf __attribute__((unused)) = {
.name = "fsf",
.gdb_regmap = {
/* GDB for this core is not supported currently */
.reg = {
XTREG_END
},
},
.clock_freq_khz = 10000,
DEFAULT_SECTIONS
};
......
......@@ -400,6 +400,7 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model);
void xtensa_translate_init(void);
void xtensa_breakpoint_handler(CPUState *cs);
int cpu_xtensa_exec(CPUXtensaState *s);
void xtensa_finalize_config(XtensaConfig *config);
void xtensa_register_core(XtensaConfigList *node);
void check_interrupts(CPUXtensaState *s);
void xtensa_irq_init(CPUXtensaState *env);
......
......@@ -51,6 +51,20 @@ static void xtensa_core_class_init(ObjectClass *oc, void *data)
cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
}
void xtensa_finalize_config(XtensaConfig *config)
{
unsigned i, n = 0;
if (config->gdb_regmap.num_regs) {
return;
}
for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) {
n += (config->gdb_regmap.reg[i].type != 6);
}
config->gdb_regmap.num_regs = n;
}
void xtensa_register_core(XtensaConfigList *node)
{
TypeInfo type = {
......
......@@ -22,8 +22,7 @@ mkdir -p "$TARGET"
tar -xf "$OVERLAY" -C "$TARGET" --strip-components=1 \
--xform='s/core/core-isa/' config/core.h
tar -xf "$OVERLAY" -O gdb/xtensa-config.c | \
sed -n '1,/*\//p;/pc/,/a15/p' > "$TARGET"/gdb-config.c
NUM_REGS=$(grep XTREG "$TARGET"/gdb-config.c | wc -l)
sed -n '1,/*\//p;/XTREG/,/XTREG_END/p' > "$TARGET"/gdb-config.c
cat <<EOF > "${TARGET}.c"
#include "cpu.h"
......@@ -34,10 +33,9 @@ cat <<EOF > "${TARGET}.c"
#include "core-$NAME/core-isa.h"
#include "overlay_tool.h"
static const XtensaConfig $NAME __attribute__((unused)) = {
static XtensaConfig $NAME __attribute__((unused)) = {
.name = "$NAME",
.gdb_regmap = {
.num_regs = $NUM_REGS,
.reg = {
#include "core-$NAME/gdb-config.c"
}
......
......@@ -28,6 +28,7 @@
#define XTREG(idx, ofs, bi, sz, al, no, flags, cp, typ, grp, name, \
a1, a2, a3, a4, a5, a6) \
{ .targno = (no), .type = (typ), .group = (grp), .size = (sz) },
#define XTREG_END { .targno = -1 },
#ifndef XCHAL_HAVE_DIV32
#define XCHAL_HAVE_DIV32 0
......@@ -316,6 +317,7 @@
static XtensaConfigList node = { \
.config = &core, \
}; \
xtensa_finalize_config(&core); \
xtensa_register_core(&node); \
}
#else
......
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