Mention output overlaps.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5619 c046a42c-6fe2-441c-8c8c-71466251a162

tcg/README

@@ -390,6 +390,11 @@ GCC like constraints are used to define the constraints of every
 instruction. Memory constraints are not supported in this
 version. Aliases are specified in the input operands as for GCC.
 
+The same register may be used for both an input and an output, even when
+they are not explicitly aliased.  If an op expands to multiple target
+instructions then care must be taken to avoid clobbering input values.
+GCC style "early clobber" outputs are not currently supported.
+
 A target can define specific register or constant constraints. If an
 operation uses a constant input constraint which does not allow all
 constants, it must also accept registers in order to have a fallback.