提交 05453526 编写于 作者: J Jean-Christophe Dubois 提交者: Peter Maydell

i.MX: Standardize i.MX GPT debug

The goal is to have debug code always compiled during build.

We standardize all debug output on the following format:

[QOM_TYPE_NAME]reporting_function: debug message

We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output
is following the same format as the above debug.
Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: NJean-Christophe Dubois <jcd@tribudubois.net>
Message-id: b7ce7e98a051479453744aded122789531d80a44.1445781957.git.jcd@tribudubois.net
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
上级 4929f656
...@@ -16,11 +16,17 @@ ...@@ -16,11 +16,17 @@
#include "hw/misc/imx_ccm.h" #include "hw/misc/imx_ccm.h"
#include "qemu/main-loop.h" #include "qemu/main-loop.h"
/* #ifndef DEBUG_IMX_GPT
* Define to 1 for debug messages #define DEBUG_IMX_GPT 0
*/ #endif
#define DEBUG_TIMER 0
#if DEBUG_TIMER #define DPRINTF(fmt, args...) \
do { \
if (DEBUG_IMX_GPT) { \
fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX_GPT, \
__func__, ##args); \
} \
} while (0)
static char const *imx_gpt_reg_name(uint32_t reg) static char const *imx_gpt_reg_name(uint32_t reg)
{ {
...@@ -50,24 +56,6 @@ static char const *imx_gpt_reg_name(uint32_t reg) ...@@ -50,24 +56,6 @@ static char const *imx_gpt_reg_name(uint32_t reg)
} }
} }
# define DPRINTF(fmt, args...) \
do { printf("%s: " fmt , __func__, ##args); } while (0)
#else
# define DPRINTF(fmt, args...) do {} while (0)
#endif
/*
* Define to 1 for messages about attempts to
* access unimplemented registers or similar.
*/
#define DEBUG_IMPLEMENTATION 1
#if DEBUG_IMPLEMENTATION
# define IPRINTF(fmt, args...) \
do { fprintf(stderr, "%s: " fmt, __func__, ##args); } while (0)
#else
# define IPRINTF(fmt, args...) do {} while (0)
#endif
static const VMStateDescription vmstate_imx_timer_gpt = { static const VMStateDescription vmstate_imx_timer_gpt = {
.name = TYPE_IMX_GPT, .name = TYPE_IMX_GPT,
.version_id = 3, .version_id = 3,
...@@ -224,9 +212,8 @@ static uint64_t imx_gpt_read(void *opaque, hwaddr offset, unsigned size) ...@@ -224,9 +212,8 @@ static uint64_t imx_gpt_read(void *opaque, hwaddr offset, unsigned size)
{ {
IMXGPTState *s = IMX_GPT(opaque); IMXGPTState *s = IMX_GPT(opaque);
uint32_t reg_value = 0; uint32_t reg_value = 0;
uint32_t reg = offset >> 2;
switch (reg) { switch (offset >> 2) {
case 0: /* Control Register */ case 0: /* Control Register */
reg_value = s->cr; reg_value = s->cr;
break; break;
...@@ -256,12 +243,14 @@ static uint64_t imx_gpt_read(void *opaque, hwaddr offset, unsigned size) ...@@ -256,12 +243,14 @@ static uint64_t imx_gpt_read(void *opaque, hwaddr offset, unsigned size)
break; break;
case 7: /* input Capture Register 1 */ case 7: /* input Capture Register 1 */
qemu_log_mask(LOG_UNIMP, "icr1 feature is not implemented\n"); qemu_log_mask(LOG_UNIMP, "[%s]%s: icr1 feature is not implemented\n",
TYPE_IMX_GPT, __func__);
reg_value = s->icr1; reg_value = s->icr1;
break; break;
case 8: /* input Capture Register 2 */ case 8: /* input Capture Register 2 */
qemu_log_mask(LOG_UNIMP, "icr2 feature is not implemented\n"); qemu_log_mask(LOG_UNIMP, "[%s]%s: icr2 feature is not implemented\n",
TYPE_IMX_GPT, __func__);
reg_value = s->icr2; reg_value = s->icr2;
break; break;
...@@ -271,11 +260,12 @@ static uint64_t imx_gpt_read(void *opaque, hwaddr offset, unsigned size) ...@@ -271,11 +260,12 @@ static uint64_t imx_gpt_read(void *opaque, hwaddr offset, unsigned size)
break; break;
default: default:
IPRINTF("Bad offset %x\n", reg); qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
HWADDR_PRIx "\n", TYPE_IMX_GPT, __func__, offset);
break; break;
} }
DPRINTF("(%s) = 0x%08x\n", imx_gpt_reg_name(reg), reg_value); DPRINTF("(%s) = 0x%08x\n", imx_gpt_reg_name(offset >> 2), reg_value);
return reg_value; return reg_value;
} }
...@@ -322,12 +312,11 @@ static void imx_gpt_write(void *opaque, hwaddr offset, uint64_t value, ...@@ -322,12 +312,11 @@ static void imx_gpt_write(void *opaque, hwaddr offset, uint64_t value,
{ {
IMXGPTState *s = IMX_GPT(opaque); IMXGPTState *s = IMX_GPT(opaque);
uint32_t oldreg; uint32_t oldreg;
uint32_t reg = offset >> 2;
DPRINTF("(%s, value = 0x%08x)\n", imx_gpt_reg_name(reg), DPRINTF("(%s, value = 0x%08x)\n", imx_gpt_reg_name(offset >> 2),
(uint32_t)value); (uint32_t)value);
switch (reg) { switch (offset >> 2) {
case 0: case 0:
oldreg = s->cr; oldreg = s->cr;
s->cr = value & ~0x7c14; s->cr = value & ~0x7c14;
...@@ -403,7 +392,8 @@ static void imx_gpt_write(void *opaque, hwaddr offset, uint64_t value, ...@@ -403,7 +392,8 @@ static void imx_gpt_write(void *opaque, hwaddr offset, uint64_t value,
break; break;
default: default:
IPRINTF("Bad offset %x\n", reg); qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
HWADDR_PRIx "\n", TYPE_IMX_GPT, __func__, offset);
break; break;
} }
} }
......
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