sparc64-8bit-asi

Sparc64 alternate space load/store helpers expect 8 bit ASI value,
while wrasi implementation sign-extends ASI operand causing
for example 0x80 to appear as 0xFFFFFF80. Resulting value falls
out of switch in helpers and causes obscure load/store faults.

- correct wrasi by masking lower 8 bits of xor result
- use lower 8 bits of ASI register in helpers
Signed-off-by: NIgor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

target-sparc/op_helper.c

@@ -2112,6 +2112,8 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign)
     target_ulong last_addr = addr;
 #endif
 
+    asi &= 0xff;
+
     if ((asi < 0x80 && (env->pstate & PS_PRIV) == 0)
         || ((env->def->features & CPU_FEATURE_HYPV)
             && asi >= 0x30 && asi < 0x80
@@ -2406,6 +2408,9 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size)
 #ifdef DEBUG_ASI
     dump_asi("write", addr, asi, size, val);
 #endif
+
+    asi &= 0xff;
+
     if ((asi < 0x80 && (env->pstate & PS_PRIV) == 0)
         || ((env->def->features & CPU_FEATURE_HYPV)
             && asi >= 0x30 && asi < 0x80

target-sparc/translate.c

@@ -3152,6 +3152,7 @@ static void disas_sparc_insn(DisasContext * dc)
                                 break;
                             case 0x3: /* V9 wrasi */
                                 tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
+                                tcg_gen_andi_tl(cpu_dst, cpu_dst, 0xff);
                                 tcg_gen_trunc_tl_i32(cpu_asi, cpu_dst);
                                 break;
                             case 0x6: /* V9 wrfprs */