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    target/arm: Don't store M profile PRIMASK and FAULTMASK in daif · e6ae5981
    Peter Maydell 提交于
    We currently store the M profile CPU register state PRIMASK and
    FAULTMASK in the daif field of the CPU state in its I and F
    bits. This is a legacy from the original implementation, which
    tried to share the cpu_exec_interrupt code between A profile
    and M profile. We've since separated out the two cases because
    they are significantly different, so now there is no common
    code between M and A profile which looks at env->daif: all the
    uses are either in A-only or M-only code paths. Sharing the state
    fields now is just confusing, and will make things awkward
    when we implement v8M, where the PRIMASK and FAULTMASK
    registers are banked between security states.
    
    Switch M profile over to using v7m.faultmask and v7m.primask
    fields for these registers.
    Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
    Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
    Message-id: 1501692241-23310-10-git-send-email-peter.maydell@linaro.org
    e6ae5981
cpu.c 55.0 KB