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由 Peter Maydell 提交于
When taking an exception for an M profile core, we must clear the IT bits. Since the IT bits are cached in env->condexec_bits we must clear them there: writing the bits in env->uncached_cpsr has no effect. (Reported as LP:944645.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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