This is just a dummy device for ARM L2 cache controllers, based on the
pl310. The cache type parameter can be defined by a property value
and has a meaningful default.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NMark Langsdorf <mark.langsdorf@calxeda.com>
[Peter Maydell: removed stray blank line at end]
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>