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    target-mips: Misaligned memory accesses for MSA · adc370a4
    Yongbok Kim 提交于
    MIPS SIMD Architecture vector loads and stores require misalignment support.
    MSA Memory access should work as an atomic operation. Therefore, it has to
    check validity of all addresses for a vector store access if it is spanning
    into two pages.
    
    Separating helper functions for each data format as format is known in
    translation.
    To use mmu_idx from cpu_mmu_index() instead of calculating it from hflag.
    Removing save_cpu_state() call in translation because it is able to use
    cpu_restore_state() on fault as GETRA() is passed.
    Signed-off-by: NYongbok Kim <yongbok.kim@imgtec.com>
    Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
    [leon.alrae@imgtec.com: remove unused do_* functions]
    Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
    adc370a4
translate.c 599.3 KB