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    pci: Sync PCIe downstream port LNKSTA on read · 727b4866
    Alex Williamson 提交于
    The PCIe link speed and width between a downstream device and its
    upstream port is negotiated on real hardware and susceptible to
    dynamic changes due to signal issues and power management.  In the
    emulated device case there is no real hardware link, but we still
    might wish to have some consistency between endpoint and downstream
    port via a virtual negotiation.  There is of course a real link for
    assigned devices and this same virtual negotiation allows the
    downstream port to match the endpoint, synchronizing on every read
    to support underlying physical hardware dynamically adjusting the
    link.
    
    This negotiation is intentionally unidirectional for compatibility.
    If the endpoint exceeds the capabilities of the downstream port or
    there is no endpoint device, the downstream port reports negotiation
    to its maximum speed and width, matching the previous case where
    negotiation was absent.  De-tuning the endpoint to match a virtual
    link doesn't seem to benefit anyone and is a condition we've thus
    far reported without functional issues.
    
    Note that PCI_EXP_LNKSTA is already ignored for migration
    compatibility via pcie_cap_v1_fill().
    
    Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
    Tested-by: NGeoffrey McRae <geoff@hostfission.com>
    Reviewed-by: NEric Auger <eric.auger@redhat.com>
    Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
    Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
    Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
    727b4866
pcie.h 5.4 KB