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    target-arm: Don't handle c15_cpar changes via tb_flush() · c0f4af17
    Peter Maydell 提交于
    At the moment we try to handle c15_cpar with the strategy of:
     * emit generated code which makes assumptions about its value
     * when the register value changes call tb_flush() to throw
       away the now-invalid generated code
    This works because XScale CPUs are always uniprocessor, but
    it's confusing because it suggests that the same approach can
    be taken for other registers. It also means we do a tb_flush()
    on CPU reset, which makes multithreaded linux-user binaries
    even more likely to fail than would otherwise be the case.
    
    Replace it with a combination of TB flags for the access
    checks done on cp0/cp1 for the XScale and iwMMXt instructions,
    plus a runtime check for cp2..cp13 coprocessor accesses.
    Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
    Message-id: 1411056959-23070-1-git-send-email-peter.maydell@linaro.org
    c0f4af17
op_helper.c 20.6 KB