提交 3dd75525 编写于 作者: O openeuler-ci-bot 提交者: Gitee

!22 Fix bug and delete unchangable parameters.

Merge pull request !22 from Liuke/master
...@@ -86,9 +86,6 @@ static DEVICE_ATTR(prime_drop_mask, S_IRUGO|S_IWUSR, ...@@ -86,9 +86,6 @@ static DEVICE_ATTR(prime_drop_mask, S_IRUGO|S_IWUSR,
static DEVICE_ATTR(sequence_opt, S_IRUGO|S_IWUSR, static DEVICE_ATTR(sequence_opt, S_IRUGO|S_IWUSR,
val_show, val_store); val_show, val_store);
static DEVICE_ATTR(bankintlv, S_IRUGO|S_IWUSR,
val_show, val_store);
static DEVICE_ATTR(prefetch_utl_ddr, S_IRUGO|S_IWUSR, static DEVICE_ATTR(prefetch_utl_ddr, S_IRUGO|S_IWUSR,
val_show, val_store); val_show, val_store);
...@@ -146,9 +143,6 @@ static DEVICE_ATTR(snpsleep_en, S_IRUGO|S_IWUSR, ...@@ -146,9 +143,6 @@ static DEVICE_ATTR(snpsleep_en, S_IRUGO|S_IWUSR,
static DEVICE_ATTR(prefetchtgt_en, S_IRUGO|S_IWUSR, static DEVICE_ATTR(prefetchtgt_en, S_IRUGO|S_IWUSR,
val_show, val_store); val_show, val_store);
static DEVICE_ATTR(bankintl_stagger, S_IRUGO|S_IWUSR,
val_show, val_store);
static DEVICE_ATTR(cpu_pf_lqos_en, S_IRUGO|S_IWUSR, static DEVICE_ATTR(cpu_pf_lqos_en, S_IRUGO|S_IWUSR,
val_show, val_store); val_show, val_store);
...@@ -188,12 +182,6 @@ static DEVICE_ATTR(prefetch_comb, S_IRUGO|S_IWUSR, ...@@ -188,12 +182,6 @@ static DEVICE_ATTR(prefetch_comb, S_IRUGO|S_IWUSR,
static DEVICE_ATTR(reg_funcdis_comb, S_IRUGO|S_IWUSR, static DEVICE_ATTR(reg_funcdis_comb, S_IRUGO|S_IWUSR,
val_show, val_store); val_show, val_store);
static DEVICE_ATTR(ddr_intlv_skt, S_IRUGO|S_IWUSR,
val_show, val_store);
static DEVICE_ATTR(ddr_intlv_die, S_IRUGO|S_IWUSR,
val_show, val_store);
static struct attribute *prefetch_attrs[] = { static struct attribute *prefetch_attrs[] = {
&dev_attr_policy.attr, &dev_attr_policy.attr,
&dev_attr_cpumask.attr, &dev_attr_cpumask.attr,
...@@ -206,7 +194,6 @@ static struct attribute *prefetch_attrs[] = { ...@@ -206,7 +194,6 @@ static struct attribute *prefetch_attrs[] = {
&dev_attr_prefetch_drop_hha.attr, &dev_attr_prefetch_drop_hha.attr,
&dev_attr_prime_drop_mask.attr, &dev_attr_prime_drop_mask.attr,
&dev_attr_sequence_opt.attr, &dev_attr_sequence_opt.attr,
&dev_attr_bankintlv.attr,
&dev_attr_prefetch_utl_ddr.attr, &dev_attr_prefetch_utl_ddr.attr,
&dev_attr_prefetch_utl_ddr_en.attr, &dev_attr_prefetch_utl_ddr_en.attr,
&dev_attr_prefetch_utl_l3t.attr, &dev_attr_prefetch_utl_l3t.attr,
...@@ -226,7 +213,6 @@ static struct attribute *prefetch_attrs[] = { ...@@ -226,7 +213,6 @@ static struct attribute *prefetch_attrs[] = {
&dev_attr_ddr_compress_opt_en.attr, &dev_attr_ddr_compress_opt_en.attr,
&dev_attr_snpsleep_en.attr, &dev_attr_snpsleep_en.attr,
&dev_attr_prefetchtgt_en.attr, &dev_attr_prefetchtgt_en.attr,
&dev_attr_bankintl_stagger.attr,
&dev_attr_cpu_pf_lqos_en.attr, &dev_attr_cpu_pf_lqos_en.attr,
&dev_attr_refillsize_com_ada_en.attr, &dev_attr_refillsize_com_ada_en.attr,
&dev_attr_refillsize_pre_ada_en.attr, &dev_attr_refillsize_pre_ada_en.attr,
...@@ -240,8 +226,6 @@ static struct attribute *prefetch_attrs[] = { ...@@ -240,8 +226,6 @@ static struct attribute *prefetch_attrs[] = {
&dev_attr_reg_dir_replace_alg.attr, &dev_attr_reg_dir_replace_alg.attr,
&dev_attr_prefetch_comb.attr, &dev_attr_prefetch_comb.attr,
&dev_attr_reg_funcdis_comb.attr, &dev_attr_reg_funcdis_comb.attr,
&dev_attr_ddr_intlv_skt.attr,
&dev_attr_ddr_intlv_die.attr,
NULL, NULL,
}; };
......
...@@ -31,7 +31,6 @@ enum FunctionOrderList { ...@@ -31,7 +31,6 @@ enum FunctionOrderList {
RAMSWAP_ORDER, RAMSWAP_ORDER,
PRIME_DROP_MASK_ORDER, PRIME_DROP_MASK_ORDER,
SEQUENCE_OPT_ORDER, SEQUENCE_OPT_ORDER,
BANKINTLV_ORDER,
PREFETCH_ULT_DDR_ORDER, PREFETCH_ULT_DDR_ORDER,
PREFETCH_ULT_DDR_EN_ORDER, PREFETCH_ULT_DDR_EN_ORDER,
PREFETCH_ULT_L3T_ORDER, PREFETCH_ULT_L3T_ORDER,
...@@ -51,7 +50,6 @@ enum FunctionOrderList { ...@@ -51,7 +50,6 @@ enum FunctionOrderList {
DDR_COMPRESS_OPT_EN_ORDER, DDR_COMPRESS_OPT_EN_ORDER,
SNPSLEEP_EN_ORDER, SNPSLEEP_EN_ORDER,
PREFETCHTGT_EN_ORDER, PREFETCHTGT_EN_ORDER,
BANKINTL_STAGGER_ORDER,
CPU_PF_LQOS_EN_ORDER, CPU_PF_LQOS_EN_ORDER,
REFILLSIZE_COM_ADA_EN_ORDER, REFILLSIZE_COM_ADA_EN_ORDER,
REFILLSIZE_PRE_ADA_EN_ORDER, REFILLSIZE_PRE_ADA_EN_ORDER,
...@@ -65,8 +63,6 @@ enum FunctionOrderList { ...@@ -65,8 +63,6 @@ enum FunctionOrderList {
REG_DIR_REPLACE_ALG_ORDER, REG_DIR_REPLACE_ALG_ORDER,
PREFETCH_COMB_ORDER, PREFETCH_COMB_ORDER,
REG_FUNCDIS_COMB_ORDER, REG_FUNCDIS_COMB_ORDER,
DDR_INTLV_SKT_ORDER,
DDR_INTLV_DIE_ORDER,
FUNC_NUM FUNC_NUM
}; };
...@@ -143,8 +139,6 @@ enum L3tDynamicCtrlReg { ...@@ -143,8 +139,6 @@ enum L3tDynamicCtrlReg {
}; };
enum L3tDynamicAuctrl1Reg { enum L3tDynamicAuctrl1Reg {
BANKINTLV_START = 0,
BANKINTLV_END = 0,
SEQUENCE_OPT_START = 1, SEQUENCE_OPT_START = 1,
SEQUENCE_OPT_END = 1, SEQUENCE_OPT_END = 1,
REFILLSIZE_PRE_ADA_EN_START = 2, REFILLSIZE_PRE_ADA_EN_START = 2,
...@@ -154,9 +148,7 @@ enum L3tDynamicAuctrl1Reg { ...@@ -154,9 +148,7 @@ enum L3tDynamicAuctrl1Reg {
PRIME_DROP_MASK_START = 5, PRIME_DROP_MASK_START = 5,
PRIME_DROP_MASK_END = 5, PRIME_DROP_MASK_END = 5,
CPU_PF_LQOS_EN_START = 11, CPU_PF_LQOS_EN_START = 11,
CPU_PF_LQOS_EN_END = 11, CPU_PF_LQOS_EN_END = 11
BANKINTL_STAGGER_START = 19,
BANKINTL_STAGGER_END = 19
}; };
enum L3tPrefetchReg { enum L3tPrefetchReg {
......
...@@ -224,16 +224,6 @@ static FuncStruct Funcs[] = { ...@@ -224,16 +224,6 @@ static FuncStruct Funcs[] = {
.temp_mtx = &l3t_dauctrl_mtx, .temp_mtx = &l3t_dauctrl_mtx,
.Name = "sequence_opt" .Name = "sequence_opt"
}, },
[BANKINTLV_ORDER] = {
.StartBit = BANKINTLV_START,
.EndBit = BANKINTLV_END,
.Base = TB_L3T0_BASE,
.Offset = L3T_DYNAMIC_AUCTRL1,
.Sup = 1,
.Glb = 0,
.temp_mtx = &l3t_dauctrl_mtx,
.Name = "bankintlv"
},
[PREFETCH_ULT_DDR_ORDER] = { [PREFETCH_ULT_DDR_ORDER] = {
.StartBit = PREFETCH_ULT_DDR_START, .StartBit = PREFETCH_ULT_DDR_START,
.EndBit = PREFETCH_ULT_DDR_END, .EndBit = PREFETCH_ULT_DDR_END,
...@@ -424,16 +414,6 @@ static FuncStruct Funcs[] = { ...@@ -424,16 +414,6 @@ static FuncStruct Funcs[] = {
.temp_mtx = &l3t_dauctr0_mtx, .temp_mtx = &l3t_dauctr0_mtx,
.Name = "prefetchtgt_en" .Name = "prefetchtgt_en"
}, },
[BANKINTL_STAGGER_ORDER] = {
.StartBit = BANKINTL_STAGGER_START,
.EndBit = BANKINTL_STAGGER_END,
.Base = TB_L3T0_BASE,
.Offset = L3T_DYNAMIC_AUCTRL1,
.Sup = 1,
.Glb = 0,
.temp_mtx = &l3t_dauctrl_mtx,
.Name = "bankintl_stagger"
},
[CPU_PF_LQOS_EN_ORDER] = { [CPU_PF_LQOS_EN_ORDER] = {
.StartBit = CPU_PF_LQOS_EN_START, .StartBit = CPU_PF_LQOS_EN_START,
.EndBit = CPU_PF_LQOS_EN_END, .EndBit = CPU_PF_LQOS_EN_END,
...@@ -564,26 +544,6 @@ static FuncStruct Funcs[] = { ...@@ -564,26 +544,6 @@ static FuncStruct Funcs[] = {
.temp_mtx = &hha_funcdis_mtx, .temp_mtx = &hha_funcdis_mtx,
.Name = "reg_funcdis_comb" .Name = "reg_funcdis_comb"
}, },
[DDR_INTLV_SKT_ORDER] = {
.StartBit = DDR_INTLV_SKT_START,
.EndBit = DDR_INTLV_SKT_END,
.Base = TB_AA_BASE,
.Offset = AA_MSD1_CTRL,
.Sup = 3,
.Glb = 0,
.temp_mtx = &com_msd1ctrl_mtx,
.Name = "ddr_intlv_skt"
},
[DDR_INTLV_DIE_ORDER] = {
.StartBit = DDR_INTLV_DIE_START,
.EndBit = DDR_INTLV_DIE_END,
.Base = TB_AA_BASE,
.Offset = AA_MSD1_CTRL,
.Sup = 1,
.Glb = 0,
.temp_mtx = &com_msd1ctrl_mtx,
.Name = "ddr_intlv_die"
},
}; };
void set_prefetch(void* dummy) void set_prefetch(void* dummy)
...@@ -717,7 +677,7 @@ void reset_default_cfg(int *old_cfg_int) ...@@ -717,7 +677,7 @@ void reset_default_cfg(int *old_cfg_int)
{ {
int funcnum = 0; int funcnum = 0;
for (funcnum = 0; funcnum < FUNC_NUM; funcnum++) { for (funcnum = 0; funcnum < FUNC_NUM; funcnum++) {
Funcs[funcnum].Val = old_cfg_int[0]; Funcs[funcnum].Val = old_cfg_int[funcnum];
set_val(Funcs[funcnum]); set_val(Funcs[funcnum]);
} }
return; return;
......
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