1. 03 8月, 2015 2 次提交
  2. 31 7月, 2015 2 次提交
  3. 30 7月, 2015 3 次提交
  4. 29 7月, 2015 2 次提交
  5. 27 7月, 2015 5 次提交
  6. 25 7月, 2015 3 次提交
    • L
      conf: add virDomainControllerDefNew() · e1431072
      Laine Stump 提交于
      There are some non-0 default values in virDomainControllerDef (and
      will soon be more) that are easier to not forget if the remembering is
      done by a single initializer function (rather than inline code after
      allocating the obejct with generic VIR_ALLOC().
      e1431072
    • L
      qemu: reorganize loop in qemuDomainAssignPCIAddresses · 07268782
      Laine Stump 提交于
      This loop occurs just after we've assured that all devices that
      require a PCI device have been assigned and all necessary PCI
      controllers have been added. It is the perfect place to add other
      potentially auto-generated PCI controller attributes that are
      dependent on the controller's PCI address (upcoming patch).
      
      There is a convenient loop through all controllers at the end of the
      function, but the patch to add new functionality will be cleaner if we
      first rearrange that loop a bit.
      
      Note that the loop originally was accessing info.addr.pci.bus prior to
      determining that the pci part of the object was valid. This isn't
      dangerous in any way, but seemed a bit ugly, so I fixed it.
      07268782
    • L
      conf: pay attention to bus minSlot/maxSlot when autoassigning PCI addresses · d4cf72af
      Laine Stump 提交于
      The function that auto-assigns PCI addresses was written with the
      hardcoded assumptions that any PCI bus would have slots available
      starting at 1 and ending at 31. This isn't true for many types of
      controllers (some have a single slot/port at 0, some have slots/ports
      from 0 to 31). This patch updates that function to remove the
      hardcoded assumptions. It will properly find/assign addresses for
      devices that can only connect to pcie-(root|downstream)-port (which
      have minSlot/maxSlot of 0/0) or a pcie-switch-upstream-port (0/31).
      
      It still will not auto-create a new bus of the proper kind for these
      connections when one doesn't exist, that task is for another day.
      d4cf72af
  7. 24 7月, 2015 7 次提交
  8. 23 7月, 2015 3 次提交
  9. 22 7月, 2015 13 次提交