1. 06 5月, 2016 1 次提交
  2. 04 5月, 2016 1 次提交
    • J
      qemu: Add capability for virtio-scsi iothreads · e2faa976
      John Ferlan 提交于
      An iothread for virtio-scsi is a property of the controller. Add a lookup
      of the 'virtio-scsi-pci' and 'virtio-scsi-ccw' device properties and parse
      the output.  For both, support for the iothread was added in qemu 2.4
      while support for virtio-scsi in general was added in qemu 1.4.
      
      Modify the various mock capabilities replies (by hand) to reflect the
      when virtio-scsi was supported and then specifically when the iothread
      property was added. For versions prior to 1.4, use the no device error
      return for virtio-scsi. For versions 1.4 to before 2.4, add some data
      for virtio-scsi-pci even though it isn't complete we're not looking for
      anything specific there anyway. For 2.4 to 2.6, add a more complete reply.
      Signed-off-by: NJohn Ferlan <jferlan@redhat.com>
      e2faa976
  3. 03 5月, 2016 1 次提交
  4. 02 5月, 2016 1 次提交
  5. 15 4月, 2016 3 次提交
    • P
      qemu: caps: Deprecate QEMU_CAPS_BALLOON · 2242a008
      Peter Krempa 提交于
      The flag is now unused and all qemus supported by libvirt already
      support it.
      2242a008
    • L
      qemu: add capabilities bit for device "pxb-pcie" · 0ec0bc85
      Laine Stump 提交于
          The pxb device is a PCIe expander bus that can be added to any
          Q35-based machinetype. A single PCIe port (*not* hotpluggable) is
          provided; if more than one device is desired, or if hotplug
          support is needed, either a pcie-root-port, or some combination of
          pcie-switch-upstream-port and pcie-swith-downstream-ports must be
          added to it. It can have a NUMA node number associated with it, as
          well as a bus number.
      0ec0bc85
    • L
      qemu: add capabilities bit for device "pxb" · 5d4e2b17
      Laine Stump 提交于
      The pxb device is a PCI expander bus that can be added to any
      440fx-based machinetype. The PCI bus that is created has 32 standard
      PCI slots (hotpluggable). It can have a NUMA node number associated
      with it, as well as a bus number.
      5d4e2b17
  6. 07 4月, 2016 1 次提交
  7. 11 3月, 2016 1 次提交
  8. 01 3月, 2016 2 次提交
  9. 12 1月, 2016 2 次提交
  10. 11 1月, 2016 1 次提交
  11. 24 12月, 2015 2 次提交
  12. 30 11月, 2015 2 次提交
  13. 27 11月, 2015 2 次提交
  14. 19 11月, 2015 1 次提交
    • J
      qemu: Use -incoming defer for migrations · 2c4ba8b4
      Jiri Denemark 提交于
      Traditionally, we pass incoming migration URI on QEMU command line,
      which has some drawbacks. Depending on the URI QEMU may initialize its
      migration state immediately without giving us a chance to set any
      additional migration parameters (this applies mainly for fd: URIs). For
      some URIs the monitor may be completely blocked from the beginning until
      migration is finished, which means we may be stuck in qmp_capabilities
      command without being able to send any QMP commands.
      
      QEMU solved this by introducing "defer" parameter for -incoming command
      line option. This will tell QEMU to prepare for an incoming migration
      while the actual incoming URI is sent using migrate-incoming QMP
      command. Before calling this command we can normally talk to the
      monitor and even set any migration parameters which will be honored by
      the incoming migration.
      Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
      2c4ba8b4
  15. 12 11月, 2015 1 次提交
  16. 10 11月, 2015 11 次提交
  17. 10 9月, 2015 3 次提交
  18. 10 8月, 2015 3 次提交
    • L
      qemu: add capabilities bit for device xio3130-downstream · ad1748a1
      Laine Stump 提交于
      The downstream ports of an x3130-upstream switch can each have one of
      these plugged into them (and that is the only place they can be
      connected). Each xio3130-downstream provides a single PCIe port that
      can have PCI or PCIe devices hotplugged into it. Apparently an entire
      set of x3130-upstream + several xio3130-downstreams can be hotplugged
      as a unit, but it's not clear to me yet how that would be done, since
      qemu only allows attaching a single device at a time.
      
      This device will be used to implement the
      "pcie-switch-downstream-port" model of pci controller.
      ad1748a1
    • L
      qemu: add capabilities bit for device x3130-upstream · 4cde7588
      Laine Stump 提交于
      This is the upstream part of a PCIe switch. It connects to a PCIe port
      (but not PCI) on the upstream side, and can have up to 31
      xio3130-downstream controllers (but no other types of devices)
      connected to its downstream side.
      
      This device will be used to implement the "pcie-switch-upstream-port"
      model of pci controller.
      4cde7588
    • L
      qemu: add capabilities bit for device ioh3420 · 408b100a
      Laine Stump 提交于
      This is a PCIE "root port". It connects only to a port of the
      integrated pcie.0 bus of a Q35 machine (can't be hotplugged), and
      provides a single PCIe port that can have PCI or PCIe devices
      hotplugged into it.
      
      This device will be used to implement the "pcie-root-port" model of
      pci controller.
      408b100a
  19. 21 5月, 2015 1 次提交