- 11 8月, 2015 3 次提交
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由 Andrea Bolognani 提交于
Instead of relying on a hard-coded mask value, read it from the CPU map XML and use it when looking up models by PVR.
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由 Andrea Bolognani 提交于
Use multiple PVRs per CPU model to reduce the number of models we need to keep track of. Remove specific CPU models (eg. POWER7+_v2.1): the corresponding generic CPU model (eg. POWER7) should be used instead to ensure the guest can be booted on any compatible host. Get rid of all the entries that did not match any of the CPU models supported by QEMU, like power8 and power8e. Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=1250977
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由 Andrea Bolognani 提交于
The information is not used anywhere in libvirt. No functional changes.
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- 10 7月, 2015 1 次提交
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由 Jiri Denemark 提交于
Corresponding QEMU commits: MPX 79e9ebebbf2a00c46fcedb6dc7dd5e12bbd30216 AVX512 9aecd6f8aef653cea58932f06a2740299dbe5fd3 Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 02 7月, 2015 21 次提交
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Inheritance among CPU model is cool but it makes reviewing CPU model definitions and comparing them to CPU models from QEMU rather hard and unpleasant. Let's define all CPU models from scratch. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Sorted feature list is easier to review or compare. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 26 3月, 2015 1 次提交
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由 Jiri Denemark 提交于
QEMU 2.3 adds these new models to cover Haswell and Broadwell CPUs with updated microcode. Luckily, they also reverted former the machine type specific changes to existing models. And since these changes were never released, we don't need to hack around them in libvirt. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 04 2月, 2015 1 次提交
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由 Olivia Yin 提交于
With this patch, Freescale ppc64 CPU modesl could be recognized. virsh # cpu-models ppc64 POWERPC_e6500 POWERPC_e5500 power8 power8e power7+ power7 power6 POWER8_v1.0 POWER7+_v2.1 POWER7_v2.3 POWER7_v2.1 POWER7 virsh # capabilities <capabilities> <host> <uuid>5a54efa6-20dc-4da7-b271-0b7fb7062cb8</uuid> <cpu> <arch>ppc64</arch> <model>POWERPC_e6500</model> <vendor>Freescale</vendor>
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- 07 11月, 2014 1 次提交
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由 Prerna Saxena 提交于
IBM Power processors differ uniquely across generations (such as power6, power7, power8). Each generation signifies a new PowerISA version that exhibits features unique to that generation. The higher 16 bits of PVR for IBM Power processors encode the CPU generation, while the CPU chip (sub)version is encoded in lower 16 bits. For all practical purposes of launching a VM, we care about the generation which the vCPU will belong to, and not specifically the chip version. This patch updates the libvirt PVR check to reflect this relationship. It allows libvirt to select the right CPU generation in case the exact match for a a specific CPU is not found. Hence, there will no longer be a need to add each PowerPC CPU model to cpu_map.xml; just adding entry for the matching ISA generation will suffice. It also contains changes to cpu_map.xml since processor generations as understood by QEMU compat mode go as "power6", "power7" or "power8" [Reference : QEMU commit 8dfa3a5e85 ] Signed-off-by: NPrerna Saxena <prerna@linux.vnet.ibm.com> Signed-off-by: NPradipta Kr. Banerjee <bpradip@in.ibm.com> Signed-off-by: NAnton Blanchard <anton@samba.org> Reviewed-by: NMichal Privoznik <mprivozn@redhat.com>
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- 05 9月, 2014 1 次提交
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由 Ján Tomko 提交于
Commit fba6bc47 introduced support for the 'invtsc' feature, which blocks migration. We should not include it in the host-model CPU by default, because it's intended to be used with migration. https://bugzilla.redhat.com/show_bug.cgi?id=1138221
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- 02 7月, 2014 1 次提交
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由 Ján Tomko 提交于
Add suport for invariant TSC flag (CPUID 0x80000007, bit 8 of EDX). If this flag is enabled, the TSC ticks at a constant rate across all ACPI P-, C- and T-states. This can be enabled by adding: <feature name='invtsc'/> to the <cpu> element. Migration and saving the domain does not work with this flag. QEMU support: http://git.qemu.org/?p=qemu.git;a=commitdiff;h=303752a The feature name "invtsc" differs from the name "" used by the linux kernel: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/x86/kernel/cpu/powerflags.c?id=30321c7b#n18
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- 27 6月, 2014 1 次提交
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由 Jiri Denemark 提交于
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- 14 8月, 2013 1 次提交
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由 Li Zhang 提交于
Power7+ and Power8 are supported in QEMU, so it needs to define CPUs in libvirt to support them. Signed-off-by: NLi Zhang <zhlcindy@linux.vnet.ibm.com>
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- 19 4月, 2013 2 次提交
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由 Jiri Denemark 提交于
The cpu_map.xml file is there to separate CPU model definitions from the code. Having the only interesting data for PowerPC models only in the source code. This patch moves this data to the XML file and removes the hardcoded list completely.
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由 Jiri Denemark 提交于
When ppcVendorLoad fails to parse the vendor element for whatever reason, it is supposed to ignore it and return 0 rather than -1. The patch also removes PowerPC vendor string from the XML as it is not actually used for anything.
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- 26 11月, 2012 1 次提交
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由 Peter Krempa 提交于
The new model supports following features in addition to those supported by SandyBridge: fma, pcid, movbe, fsgsbase, bmi1, hle, avx2, smep, bmi2, erms, invpcid, rtm
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- 03 11月, 2012 2 次提交
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由 Peter Krempa 提交于
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由 Peter Krempa 提交于
This patch adds a few new processor feature flags. Namely: f16c rdrand lwp tbm topoext perfctr_core perfctr_nb fsgsbase bmi1 hle avx2 bmi2 erms invpcid rtm rdseed adx tce
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- 30 10月, 2012 1 次提交
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由 Peter Krempa 提交于
A mild case of dyslexia caused that commit 012f9b19 specifies wrong mask for the smap cpu feature flag. This patch fixes that mistake.
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- 24 10月, 2012 1 次提交
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由 Peter Krempa 提交于
Qemu has added some new feature flags. This patch adds them to libvirt. The new features are for the cpuid function 0x7 that takes an argument in the ecx register. Currently only 0x0 is used as the argument so I was lazy and I just clear the registers to 0 before calling cpuid. In future when there maybe will be some other possible arguments, we will need to improve the cpu detection code to take this into account.
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- 17 10月, 2012 1 次提交
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由 Li Zhang 提交于
Currently, the CPU model driver is not implemented for PowerPC. Host's CPU information is needed to exposed to guests' XML file some time. This patch is to implement the callback functions of CPU model driver. Signed-off-by: NLi Zhang <zhlcindy@linux.vnet.ibm.com> Acked-by: NMichal Privoznik <mprivozn@redhat.com>
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